This article presents a detailed analysis of two independent IC PWM/SR solutions, and contrast with a QSR single monolithic solution.
What’s happening in the power management space amid the never-ending drive to lower power consumption in more and more complex technologies and applications? What about in applications dealing with higher and higher voltages? This month’s In Focus highlights the various design developments and manufacturing strategies happening in the power management segment.
Switching power suppliers are driven to innovate by the increasing demand for higher efficiency, which reduces energy costs to consumers, enhance environmental quality and mitigating CO2 emission.
To increase switching power supplies’ efficiency, quasi-resonant (QR) switching on the primary side and synchronous rectifier (SR) on the secondary side have been driven from exotic specialty applications to common consumer applications in the last decade. The availability of QR capable PWM and special SR IC controllers are the two key enablers.
The QR IC and SR IC, however, remain separate as two independent IC controllers up to now. The SR control is based on a passive-active scheme, where the SR controller reacts to the primary side PWM IC either by predicting or by measuring minuscule voltage changes (corresponding to SR current changes). While these techniques work well in principle, there are significant practical limitations, where at best, the benefits of SR are not fully realized (SR controller step down the Vgs to increase SR Ron in order to detect a more measurable minuscule voltage). Or, at worst, it causes cross conductions between the primary and secondary sides.
To overcome these limitations and to reduce overall costs, Sync Power has developed and are introducing the QSR PWM Monolithic controller, the SP6892, where both QR PWM and SR controller is integrated into one single IC.
In this article, we are presenting a detailed analysis of the two independent IC PWM/SR solution, and contrast with the QSR single monolithic solution.
SR Controller IC Principle
SR is a MOSFET controlled to operate as a diode. The traditional diode’s forward voltage (Vf, approximately 1V) is a significant source of inefficiency in power conversion. Diode’s forward voltage is not a function of the diode’s silicon area. On the other hand, if a MOSFET is used to operate as a diode, the forward voltage (Vds) is merely a function of “conduction current x Ron”, and Ron is determined by MOSFET silicon area and its controlling Vgs. In modern day applications, it is common that SR MOSFETs having Ron (at full Vgs) in the low mW range, which results in a conduction voltage (forward voltage) also in the mV range, many orders of magnitude improvement over traditional diodes.
With this advantage, SRMOS also comes with significant complications, in that a SRMOS must be actively controlled to operate like a diode. Failing to properly control SRMOS bears significant consequences, from reducing overall efficiency, introducing spike voltages, to cross primary-secondary conduction. Due to the precision necessary to achieve this SRMOS control, a controller IC is used in most cases. This SR control IC operates on the secondary side and is independent from the primary side PWM control IC.
Here we breakdown the nuances of independent SR control into key operational transitional points.
SRMOS Turning ON
Often, the SR controller IC senses the Vds of the SRMOS. As shown in Figure 1, when a “diode-like” forward voltage (produced by the MOS built-in body diode) is sensed, the controller IC turns ON the SRMOS by step, and increases the SRMOS Vgs. Once the Vgs is high, the SRMOS conducts current via its MOS channel, which has mW range Ron. Unlike a diode, the MOS channel is capable of conductions in both directions.
SRMOS Turning OFF in DCM
Since SR is on the secondary side, once in the conduction state, the SR current decrease as the transformer/inductor is being discharged. The SR controller IC detects this current by detecting SRMOS’s Vds voltage (Vds = Ron x Ids). Since at full Vgs, Ron is in the mW range and Ids is decreasing, these two factors make accurately detecting SR Vds a challenge. Failing to accurately detect Vds to turn OFF the SR can risk SR negative current, which is at the cost of reduced efficiency and voltage spikes, as shown in Figure 2.
To manage this risk, many SR controllers “manages SRMOS Vgs/Ron” by reducing SRMOS Vgs with decreasing Ids, so that SRMOS’s Ron is increased which allows more accurate Vds sensing with larger Vds as shown in Figure 3. However, with larger Vds, the SRMOS is less efficient and the full potential of SRMOS is not realized.
SRMOS Turning OFF in CCM
In CCM, as shown in Figure 3, failure to turn OFF SR before primary switch turn ON produces cross conduction, which has serious consequences, not only in terms of efficiency, but also possible destruction of the converter itself.
Here, “Vgs/Ron Management” does not work as well, because of the higher current levels. In CCM, the SR current are higher and never reaches zero within the cycle. (Figure 4)
Most importantly, unlike in DCM, the CCM SR current’s reversal is caused by primary side switch turning ON, thus, the reversal has a very large current in a very short period of time. Here, the SR cross conducts with the primary switch, resulting in extreme voltage spikes, and possible converter destruction.
Some manufactures take the next zealous step to aid their SR turn OFF in CCM, by careful placing PCB layout, to increase the parasitic inductance in the SR conduction path. The parasitic inductance produces a spike voltage when there is a rapid directional current change (SR current reversal) as primary switch turning ON while SR is conducting. This spike voltage is sensed by the SR controller, and the controller uses an ultra-rapid OFF driver to turn OFF the SRMOS to avoid further SR/Primary cross conduction. (Figure 5)
It is important to note, however, that the occurrence of this spike voltage indicates that cross conduction has already occurred.
While these efforts are commendable and work well in many applications, they are nonetheless precarious, and are limited to light CCM. For this reason, many SR controller ICs products, while claim capable in CCM, limit its operation in light CCM and with significant SRMOS “Vgs/Ron management” as well as placing limits on SRMOS selections.
MOSFET Selection and “Vgs/Ron Management”
Most SR controller IC datasheets list a minimum Ron value for the selection of SRMOS, with the implication that the lower the Ron, the better SR efficiency gain. However, with “Vgs/Ron management”, the SRMOS Ron is less meaningful. This point needs to be considered when making the selection, given that lower Ron MOSFETs are costlier while give corresponding higher efficiency.
Monolithic PWM/SR Controller
The excruciating efforts and techniques used in the independent SR controllers are mostly due to the passiveness of this method. The SR controller IC can only passively sense the secondary side current/voltage and make a determination of the state of the power converter.
To overcome these limitations, the SR controller requires direct communication with the primary side PWM controller, as shown in Figure 6.
This is especially useful in the case of CCM, where in a monolithic controller, it turns OFF the SR before turning ON the primary switch. This guarantees that NO cross conduction between SR and primary switch can occur, removing the most vulnerable aspect of SR application. This allows the use of SR in deep CCM, where independent SR controller has the highest risk.
The monolithic PWM/SR controller also removes the need to detect the minuscule SR Vds voltage (often in the mV range). No “Vgs/Ron Management” is necessary here.
The MOSFET can be selected without considering the SR controller, as the monolithic controller does not take information from SR Vds or SR Ron. The designer can choose MOSFET as necessary to meet efficiency and cost requirements.
However, a monolithic SR controller requires a pulse transformer to drive and control the SR from the primary side. The need for a pulse transformer often causes hesitation among designers due to its bulkiness and added cost.
Traditionally, the pulse transformer core is a function of the driving frequency. Given most converters operate in the 100 Khz range, the resulting core size is relatively large, and a significant obstacle in most applications. If a smaller core is used, the pulse transformer will saturate and lose the ability to control the SR.
To overcome this, we need to positively drive the small core to near saturation when turning ON the SR, and then disconnect the core until SR is turned OFF. Luckily, a well-known technique1 offers just such a function, as shown in Figure 7. With the positive charging pulse, the SR Vgs is charged through the body diode of MOSFET Q1; when the core becomes nearly saturated, the winding voltage drops, but the Q1 body diode prevents the discharge of SR (Q2) Vgs, until such a time, when a negative drive comes, turn ON Q11 and discharges SR Vgs.
This simple yet elegant solution has an unfortunate shortcoming, in that during the SR Vgs OFF state, Q1 is OFF and the SR gate has high impedances. A SRMOS gate connected to high impedances is vulnerable to noises at SRMOS drain due to the parasitic MOS drain to gate capacitance as shown in Figure 8.
To overcome this shortcoming, Sync Power has developed a patent pending technology. Referring back to Figure 6, the addition of another MOS (mn2) to the mn1, together with a special push and pull tri-state driver circuit in the monolithic PWM/SR IC, keeps the SR gate in low impedance during the OFF state. This allows the use of very small core with only a few windings for this application.
Sync Power Monolithic PWM/SR IC
Sync Power has developed this type of monolithic PWM/SR IC that incorporated all the discussed control methods, that has the following features and capabilities:
A typical SP6892 application for a flyback converter is shown in the schematic below.
This converter operates with ease in the CCM. The monolithic PWM/SR SP6892 ensures that the primary switch is OFF before SR is turned ON as shown in Figure 10. This is achieved without sensing mV range SR voltages and is independent of SRMOS selection.
In DCM mode, the monolithic IC senses primary side voltage, and determine the best SR turn OFF timing as shown in Figure 11.
The waveforms and performance data were taken from a 60W converter (pictures below).
Independent PWM and SR control schemes requires the SR controller IC to use “Vgs (Ron) management” to sense mV range voltages. In CCM, even more heroic schemes are necessary to avoid cross conduction, including layout requirements to include parasitic inductance. The consequence of SR control failure is severe and must be avoided.
The monolithic PWM/SR control IC offers direct communication between PWM and SR, and ensures no cross conduction between the primary switch and the SR. The SP6892 uses a patent pending driver for smaller pulse transformer core, reduces the cost and board space.
About the Author
H.P. Yee, PhD, is the CTO of Sync Power Corp. Dr. Yee taught electrical engineering at the University of Washington from the early 1990s to 2001. He has since been working in private industry and holds numerous patents in the area of power conversion.