UMC and Cadence Partner on Analog/Mixed-Signal Flow for 22ULP/ULL Process Nodes

Article By : Cadence Design Systems Inc.

Cadence's analog/mixed-signal IC design flow has been certified for UMC's 22ULP/ULL process technologies.

Cadence Design Systems Inc.’s analog/mixed-signal (AMS) IC design flow has been certified for United Microelectronics Corp.’s (UMC) 22ULP/ULL process technologies. This flow optimizes process efficiency and shortens design cycle time, accelerating the development of 5G, IoT and display application designs to meet increasing market demand.

UMC’s 22nm process features ultra-low power consumption and ultra-low leakage to meet various application requirements including extended battery life, a small form factor, and strong computing capabilities. The UMC-certified Cadence AMS flow provides a Unified Reliability Interface (URI), which enables customers to better monitor the circuit’s reliability and service life when designing on UMC’s 22ULP/ULL processes while achieving an ideal balance between cost and performance. The Cadence AMS flow also includes an actual demonstration circuit, which users can apply during design to enhance efficiency and precision.

The Cadence AMS flow consists of integrated solutions and methodologies enabled by the UMC 22nm process design kit (PDK) to speed a design to completion.

  • The Virtuoso design platform, including schematic editing, the analog design environment (ADE), and layout XL tool enablement.
  • Spectre AMS Designer, which combines the power of the Spectre X Simulator and the Xcelium Logic Simulation engine to provide consistent and accurate results of designs consisting of transistor, behavioral, timing and parasitic block representations.
  • Voltus-Fi Custom Power Integrity Solution provides electromigration and IR drop (EM-IR) analysis, which lets users quickly input the required EM rules.

“UMC is committed to providing leading foundry solutions and advanced specialty technologies that meet the requirements of applications in fast-growing markets such as 5G, IoT, and display,” said Osbert Cheng, vice president of device technology development and design support at UMC. “When compared with 28nm capabilities, UMC’s 22ULP/ULL process technologies can reduce chip die area by 10%, provide better power efficiency, and enhance radio frequency performance. Through this collaboration with Cadence, we are providing customers with an industry-leading design solution, enabling greater efficiency and speeding time to market.”

“With the increasing design complexity of 5G, IoT and smart wearables, enhancements in analog and mixed-signal technology are critical for the success of advanced IC designs,” said Ashutosh Mauskar, vice president, product management in the Custom IC & PCB Group at Cadence. “The Cadence AMS flow that has been optimized for use on UMC’s 22ULP/ULL process technologies, provides customers with comprehensive solutions across design, verification and implementation. By collaborating with UMC, we’re enabling mutual customers to rapidly achieve innovative mixed-signal designs on 22ULP/ULL.”

 

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