TSMC Leading the way in EUV Adoption

Article By : Alan Patterson

TSMC's boast that it is the first to commercialize EUV lithography is probably justified, according to analysts.

TSMC’s boast that it is the first chipmaker to commercialize EUV lithography technology is probably justified, according to a number of analysts surveyed by EE Times.

On Oct. 7, the world’s largest foundry announced that its 7nm plus (N7+) node has become the industry’s first commercially available (extreme ultra-violet) EUV technology. TSMC said in a press statement that it has been quickly deploying capacity to meet N7+ demand driven by multiple customers.

“TSMC is clearly leading the EUV pack, both in terms of tools taken and ordered, numbers of commercial EUV wafers produced and integration of EUV into their coming roadmap,” says Jim Fontanelli, a senior analyst with Arete Research.

The leading edge is currently at 7+ with about three layers done using EUV, he says. In 2020, TSMC will ramp 5nm in the second half with significantly increased EUV usage of about 15 layers, followed by 6nm ramping at the end of 2020 with about four layers done in EUV, according to Fontanelli.

EUV timeline 2018 Zeiss

The timeline for the development of lithography leading up to the use of EUV. (Source: Zeiss)

AMD is probably TSMC’s key customer for 7+ because of limited wafer availability at 7nm, but Huawei will lead at 5nm followed by Apple, both seeking to take advantage of die-size benefits plus normal power and speed improvements, he says. In the meantime, MediaTek is likely to be TSMC’s leading customer at the 6nm node due to persistent limited wafer availability on 7nm, according to the Arete analyst.

EUV has been difficult to implement, yet the technology will become essential to production of finer features on chips, according to Samsung, TSMC’s main competitor in the foundry business. Highlighting the difficulty, the power target for EUV lithography is at least 250 W, while for other conventional lithography sources, it is much less. Immersion lithography light sources target 90 W, dry ArF (argon fluoride) sources 45 W, and KrF (krypton flouride) sources 40 W. High-NA EUV sources are expected to require at least 500 W.

Yet EUV offers key advantages that offset the soaring expense of making chips at 7nm and more advanced nodes. EUV provides a roughly 20 percent reduction in mask levels, which in turn cuts production cycle time, according to Samsung. Chip designers who take advantage of EUV processes can avoid the triple- and quadruple-patterning techniques that fabs have struggled with while using 193nm immersion lithography.

“Each passing month makes this powerful and increasingly robust technology more compelling, and more of a necessity for the leading-edge semiconductor community,” according to Yongjoo Jeon, principal professional for Samsung’s foundry business.

Samsung introduced EUV with their 7LPP node late last year, with production used internally for Samsung’s application processors and possibly Qualcomm, but not in high volume, according to Arete analyst Fontanelli. Samsung has plans for 6nm EUV next year and 5nm EUV in development with likely volume in 2021, he says.

“The key issue is wafer volume — whilst Samsung have internal volume guaranteed for handset APs, they have a limited external customer set at the leading edge, with Qualcomm as their main customer,” Fontanelli says. Samsung may lose some of the Qualcomm business to TSMC, he adds.

EUV trio
At this point, only three chipmakers — TSMC, Samsung and Intel — are planning to adopt EUV in their production roadmaps. Intel is in third place, according to Fontanelli.

“Intel looks like they have fully committed to EUV at 7nm which will be sometime in 2021,” Fontanelli says. “The number of layers will likely be lower than TSMC at 5nm due to process requirement differences, probably less than 10 layers.”

Intel remains the dark horse in the EUV race.

“Intel is the enigma among the three because it doesn’t have a sales reason to publicize what it’s doing, and Intel has always been good at pushing its litho tools a node further than anyone else,” says Dan Hutcheson, CEO of VLSI Research. “Intel’s been the most aggressive in EUV research over the years. Intel doesn’t have a marketing need to brag about EUV, so they won’t announce until they are confident about its readiness for manufacturing.”


ASML’s EUV system

Originally, Intel’s 7nm generation was slated for introduction in 2017, but delays in 14nm and 10nm delayed the company’s planned launch of 7nm MPUs to 2021, IC Insights vice president Brian Matas notes. In May 2019, Intel executives claimed the company’s 7nm technology would challenge the performance of 5nm processes planned by TSMC, Matas said.

Early days
It will be years before EUV wins widespread adoption, and smaller chipmakers can breathe a sigh of relief, continuing to use older lithography tools for the foreseeable future.

“EUV is only needed for the smallest features, so we expect fabs to continue using optical for most layers,” says Linley Group principal analyst Linley Gwennap. “TSMC says 7nm+ uses EUV for four layers, and the next-generation 5nm node will use EUV for 14 layers. As transistors continue to shrink, EUV is needed for more layers.”

Although TSMC says that its 7nm+ yields are good, we have yet to see any phones ship with 7nm+ processors, Gwennap says. He points out that the initial Mate 30 phones from Huawei use the 7nm Kirin 990, not the 7nm+ 5G version. In contrast, Samsung has been shipping its 7nm EUV chips in its Note 10 smartphones since August, so yields must be reasonable, Gwennap says.

“Intel is at least two years behind, with its first EUV product due in late 2021 at best,” according to Gwennap.

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