Telecommunications Systems for Space Environments

Article By : M. Di Paolo Emilio

The growing interest in Test & Measurements and Space solutions for special applications such as Lidar and radio-astronomy has increased the demand for high calculation speed using minimum power.

The advent of demanding applications in terms of data synchronization requires new and fast data conversion solutions to offer a robust and reliable configuration. Nowadays, there is an increase in the number of hardware platforms available on the market thanks to the higher availability of advanced high-efficiency processors.

The growing interest in Test & Measurements and Space solutions for special applications such as Lidar and radio-astronomy has increased the demand for high calculation speed using minimum power. The complex digital sampling systems are based on sophisticated timing techniques that can cause latencies that do not ensure the alignment of the sample and, therefore, a perfect conversion. The deterministic synchronization is based on around a pair of event-driven differential electric signals, which ensure the timing system reset related to the destination converter and alignment to the reference master clock.

A/D Converter

The performance of systems that incorporate data converters largely depends on the quality of the sampling. The uncertainty of the instantaneous moment in which the converter establishes the value from analog to digital (ADC) is defined as clock jitter. The jitter effect can be assessed by focusing on the frequency domain of the corresponding jitter phase noise representation.

In general, the main limits imposed on the ADC electronics are due to the contribution of thermal noise that affects the resolution and the jitter, which directly affects the maximum input frequency in the ADC. To overcome these limits, more complex multi-channel architectures are used that combine the technique of subsampling with those of additional processing to reduce quantization noise. As data converters increase sampling frequencies and resolutions, clock jitter is more sensitive to several design conditions. Clock timing quality is one parameter to take into consideration.

The new Teledyne EV12AQ605 ADCs can be synchronously linked together in a robust and reliable configuration, without being affected by operating conditions. EV12AQ605 is pin to pin compatible with EV12AQ600. This new ADC variant aims at addressing high volume commercial and industrial market segments such as Test&Measurement, Lidar, and upgrade of particle accelerators, radio-astronomy for quantity > 500Pcs/year. The main differences between the EV12AQ600 and the EV12AQ605 are reported in the following table. All other functionalities are identical (Table 1).

table1

Table 1: differences between EV12AQ600 and the EV12AQ605

The solutions for a wide range of applications manage EV12AQ605 independently or synchronized, in quad-channel mode at 1.6 Giga Sample per second (Gsps), in dual channel mode at 3.2 GSps or in single-channel mode at 6.4 Gsps. EV12AQ605 is equipped with a Cross Point Switch (CPS), which allows the device to operate its four cores simultaneously, independently or in pairs, so as to have its maximum sampling rate.

Thanks to the possibility of managing a wide range of system configurations through a single highly versatile ADC solution, it is possible to minimize the associated design costs. The number of channels used, gain, offset, and sample delay are all programmable through its SPI interface.

The EV12AQ605 contains the proven chain synchronization feature of Teledyne e2v’s. This feature allows meeting the growing trend of increasing the number of channels in large phased antennas and MIMO (Multiple Input Multiple Output) systems for broadband microwave backhaul, as well as multi-channel digital memory (DSO) oscilloscopes. This makes the ADC highly capable and customizable, suitable for different Test & Measurements systems (figures 1 and 2).

EV12AQ605

Figure 1: EV12AQ605

EV12AQ605 configurations

Figure 2: EV12AQ605 configurations with Independent ADC or synchronized ADC

The sensory perception of an autonomous vehicle involves the acquisition and processing of data from the sensors in an understanding of the world around the vehicle itself. LIDAR uses pulses of light to transform the physical world into 3D digital images in real-time, offering a high level of security. Traditional LIDAR systems, found mainly on test vehicles today, are expensive and can be made of mechanical components that can cause downtime. The autonomous detection of vehicle perception for LIDAR and RADAR with high-performance ADC solutions allows the integration of safe and high-quality real-time processing required today for trusted ADAS systems, guaranteeing a secure and autonomous future cost reduction.

D/A Converter

The advent of demanding applications in terms of data synchronization requires new and fast data conversion solutions from the market to offer a robust and reliable configuration. The control center subsystem of a space mission mainly includes the satellite in-flight control subsystem, satellite planning, orbit determination, and telemetry. Nowadays, there is an increase in the number of hardware platforms available on the market thanks to the progress in the availability of advanced high-efficiency processors. Moreover, the greater electronic density and the increasing availability of interfaces allow the new embedded platforms to no longer worry about memory resources.

The new DAC of Teledyne e2v provides an analog bandwidth extending beyond 7 GHz, facilitating multi-band, direct digital synthesis up to K-band (26.5GHz). EV12DS480 is also ready for space applications, designed for new space systems in a plastic package, it is offered in various reliability grades including NASA grade 1. Radiation data will be available in Q2 2019. The EV12DS480 operates at up to 8.5 GSPS. It has four output operating modes (NRZ, RTZ, NRTZ & RF). And it also includes an exclusive programmable pulse shaping feature that is useful to work across multiple Nyquist zones (figure 3).

EV12DS48

Figure 3: block diagram of EV12DS48

In order to achieve full-speed operation of the EV12DS4xxZPY-EB 12-bit DAC, a multi-layer board structure was retained for the evaluation. Ten copper layers are used, which are dedicated to the signal traces, ground planes, and power supply planes. The board is made in RO 4003 and 370 HR dielectric material (Figure 4).

EV12DS4xxZPY-EB 12-bit DAC

Figure 4: board overview for the EV12DS4xxZPY-EB 12-bit DAC. A: DAC jumper configuration. B: General power supply. C: Application LED. D: External DAC power supplies. E: DAC temperature diode. F: Communication between FX2 and DAC through FPGA. G: Configuration DAC power supplies. H: Communication between FX2 and FPGA. I: Spare SAMTEC connector. J: Spare SMA. K: JTAG FPGA connector. L: DSP_CLK configuration and connectors. M: SYNC configuration and connectors. N: FX2 reset. O: Communication from FPGA to DAC.

Resolution and relative efficiency within a space environment are very important to complete the mission. Although satellite designs are finalized after extensive project reviews, detailed analysis, and multiple test procedures, unfavorable circumstances can still occur. High digital processing, together with a correct PCB for high-speed RF, are special features for new converters to implement telecommunications systems for space environments. It is essential to keep track of various telemetry parameters through proper monitoring to detect any anomalies of interest.

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