China set to deliver supercomputer “Tianhe-3” by 2020
Tianhe-3, the next major milestone in supercomputing performance, is set to be released by China in 2020. But will its…
Zynq UltraScale+ family sees streamlined dual-core devices
The new family enables the development of flexible, standards-based platforms by providing 5X system-level performance/watt and any-to-any connectivity with the…
ESD protection device optimises transistor structure
Analysis of 3D simulations has allowed Toshiba to identify a mechanism for optimising transistor structure to boost ESD robustness.
Cavium, QLogic $1B deal expands data centre chips
The acquisition adds Qlogic's Fibre Channel and Ethernet controllers and boards to Cavium's line up of communications, security and general-purpose…
Latest SDSoC accelerates C/C++ based programming
Xilinx extends SDSoC development environment that enables software-defined programming of the 16nm Zynq Ultrascale+ MPSoC.
Do carmakers know what their self-driving car architecture will be in 2020? – Part 1
Do carmakers and tier ones today already know their autonomous car system architecture in 2020? EE Times' Junko Yoshida explores…
Do carmakers know what their self-driving car architecture will be in 2020? – Part 2
Find out about different autonomous car platforms and how they combine deep learning, sensor fusion and surround vision in the…
Multicore processors give embedded vision apps a boost
Synopsys’ fully programmable and configurable DesignWare EV61, EV62 and EV64 embedded vision processors combine one, two or four vision CPU…
NI, HP deliver pre-tested Big Analog Data solutions
The companies are bringing to market pre-tested Big Analog Data solutions based on NI DataFinder Server Edition software and HPE…
OVP Fast Processor Model aimed at Renesas RL78 CPU
The RL78 model, developed by eSOL TRINITY, Imperas’ partner in Japan, provides technical support for Imperas customers as well as…
ARM’s VR-ready CPU, GPU to revive smartphone demand
According to the VP of marketing of ARM, the Mali-G71 processor is up to the task of augmented reality and…
Open acceleration framework improves data centre efficiency
For the first time in the industry, a single interconnect technology specification will ensure that processors using different instruction set…
