Siemens Extends Support of Multiple IC Design Solutions for TSMC’s Latest Processes

Article By : Siemens Digital Industries Software

Siemens' ongoing collaboration with TSMC has resulted in new product certifications for several of its most advanced toolsets.

Siemens Digital Industries Software’s ongoing collaboration with long-time foundry partner Taiwan Semiconductor Manufacturing Co. Ltd (TSMC) has resulted in new product certifications for several of Siemens’ most advanced toolsets. The announcement was made at the recent TSMC 2022 Technology Symposium.

Siemens’ Aprisa digital implementation solution has been certified by TSMC for its industry-leading N5 and N4 advanced process technologies, paving the way for customers to design projects targeting high-volume applications with the fully certified Aprisa technology that supports all design rules and features of TSMC’s latest advanced technologies. To achieve this certification, the Aprisa solution successfully passed a rigorous process that exercised the full physical implementation flow. The Siemens solution passed all signoff criteria, including DRC, LVS, timing, power and power integrity requirements. The Aprisa solution files for N5 and N4 designs will be available from TSMC upon customer request.

The certifications of Siemens’ Aprisa toolset for TSMC’s N5 and N4 processes represent the latest in a series of milestones reflecting Siemens’ strong investment in its Aprisa digital implementation solution to help designers overcome some of the most daunting challenges in today’s integrated circuit designs.

Other Siemens EDA offerings recently certified for TSMC’s latest processes include the Calibre nmPlatform tool, Siemens’ industry-leading physical verification solution for IC sign-off, as well as the Analog FastSPICE platform, which provides leading-edge circuit verification for nanometer analog, radio frequency (RF), mixed-signal, memory, and custom digital circuits. Both of these cornerstone Siemens EDA product lines are now certified for TSMC’s advanced N4P and N3E processes. Additionally, as part of the custom design reference flow (CDRF) for TSMC’s N3E process, the Analog FastSPICE platform supports Reliability Aware Simulation, which includes aging, real-time self-heating effect and advanced reliability features.

“In certifying the Aprisa, Calibre and Analog FastSPICE toolsets for the foundry’s latest, most advanced processes, TSMC and Siemens are collaborating to help mutual customers meet aggressive time-to-market metrics, while achieving optimal performance, power and area,” said Joe Sawicki, executive vice president, IC-EDA for Siemens Digital Industries Software. “Once again, the combined expertise of TSMC and Siemens EDA has provided the global IC design community with joint solutions needed for creating and quickly validating innovative ICs targeting multiple high-growth markets and applications.”

Included in the overall certification of the Calibre platform is Siemens’ Calibre xACT software. This software is now certified for TSMC’s N3E/N4P processes, enabling sign-off parasitic extraction capability for high frequency, high-speed digital and other advanced applications that mutual Siemens and TSMC customers’ target.

“The successful outcomes of TSMC’s recent collaboration with Siemens EDA help our mutual customers with design solutions benefitting from the significant power reduction and performance boosts of TSMC’s most advanced technologies,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “We look forward to continuing our close partnership with Siemens EDA to deliver difference-making technologies that enable our mutual customers to deliver silicon innovations to market more quickly.”

 

Subscribe to Newsletter

Leave a comment