Ten of the 19 fabs set to be built worldwide in 2016 and 2017 will be in China, according to the trade group SEMI.
Industry body SEMI reports that 19 wafer fabs will see construction this year as well as the next, and China will be reposnsible for more than half of them.
As a result spending on chipmaking equipment which had started slowly in 2016 will pick up and result in a market worth $36 billion in 2016, up 1.5% on 2015 and rise to $40.7 billion in 2017, up 13% year-on-year.
Fab equipment spending including new, secondary, and in-house declined by 2% in 2015. Activity in the 3D NAND, 10nm logic, and foundry segments is expected to push equipment spending up in 2016 and 2017.
SEMI has listed 19 wafer fab projects with a probability of happening on time of 60% or higher. While some are already underway, others may be subject to delays or pushed into the following year.
Christian Dieseldorff, an analyst and research director who tracks fab construction for SEMI, said in an email exchange with EE Times that the 19 fabs set to begin construction in 2016 and 2017 is a low number by historical standards.
“We see fewer new fabs beginning construction because more companies are upgrading or converting existing facilities,” Dieseldorff said.
Figure 1: New fabs and lines beginning construction in 2016 & 2017. (Source: World Fab Forecast report, June 2016, SEMI (www.semi.org)
Breaking down the 19 projects by wafer size, 12 of the fabs and lines are for 300mm (12-inch), four for 200mm, and three LED fabs (one each for 150mm, 100mm, and 50mm). Not including LEDs, the potential installed capacity of all these fabs and lines is estimated at almost 210,000 wafer starts per month (in 300mm equivalents) for fabs beginning construction in 2016 and 330,000 wafer starts per month (in 300mm equivalents) for fabs beginning construction in 2017.
Figure 2: All fab construction projects (new and existing fabs). (Source: World Fab Forecast report, June 2016, SEMI (www.semi.org)
Table 2 lists all construction projects – including new and ongoing – planned for 2016 and 2017, by wafer size, with total estimated spending of $13.9 billion.