The Singapore centre conducts multi-disciplinary research to develop new innovations for fan-out wafer-level packaging.
United States-based Applied Materials and the Institute of Microelectronics are adding five more years to their research collaboration to focus on advancing fan-out wafer-level packaging (FOWLP), a technology that is expected to help make chips and end-user devices smaller, faster and more power efficient.
Applied Materials and IME, a research body under Singapore's Agency for Science, Technology and Research (A*Star), are expected to invest an additional $139 million to expand to a second location at Fusionopolis 2, in addition to the existing facility at Singapore’s Science Park II.
The two facilities combined will span an area of approximately 1,700 square meters and be staffed by a team of close to 100 researchers, scientists and engineers. The centre was built to develop new capabilities in advanced packaging through a full line of Applied Materials’ wafer-level packaging (WLP) processing equipment.
The Singapore centre conducts multi-disciplinary research to develop new innovations in advanced packaging including bump, TSV, 2.5D interposers and now FOWLP. Through its work at the centre, Applied Materials has developed technology that has been successfully implemented in several of its semiconductor equipment products.