GOWIN Semiconductor Corp.,announces SDR-Mode (Single-Data-Rate) MIPI I3C Standardized Sensor Interface Solution – A High-Speed Serial Interface IP (Master-Slave-Combined).
JiNan, China, Jan 10th, 2018 – GOWIN Semiconductor Corp., the World’s leading non-volatile-technology programmable logic device provider, today announces SDR-Mode (Single-Data-Rate) MIPI I3C Standardized Sensor Interface Solution – A High-Speed Serial Interface IP (Master-Slave-Combined). The solution is based on GOWIN LittleBee family GW1N-9 device, including IP core, reference design and development board as a total solution.
I3C is a new generation two-wire serial bus interface developed by MIPI Alliance Sensor Working Group and collaborated by industry-wide sensor chip makers, IP companies and Top-Tier ODMs in mobile and embedded markets. I3C is targeted to be a fundamental interface for mobile, embedded system and IoT applications; it is an extension of former I2C standard and downward compatible. GOWIN Semiconductor Corp, a member of MIPI Alliance, offers the GWI3C IP solution, which is fully compliant with MIPI Alliance’s I3C standard. The IP can be dynamically configured to be I3C Master or I3C Slave, implemented within GW1N family FPGA, for communicating seamlessly with any other devices compliant with MIPI Alliance SWG I3C and I2C standard.
“As the first China-based MIPI Alliance member and leading FPGA supplier, GOWIN Semiconductor Corp. is committed to deliver the latest technology to our customer,” Stanley Tse, Regional Sales Director (Asia) of GOWIN Semiconductor Corp. “The GWI3C IP that GOWIN announces today supports SDR-Mode (Single-Data-Rate) and we will support DDR-Mode (Double-Data-Rate) to achieve much higher transfer data rate up to 33Mbps in future release. The current release is downward-compatible with I2C protocol and able to connect I2C slave devices directly, while we will extend to support I3C-To-SPI and I3C-To-UART bridging in next release. The GOWIN I3C-ECO-IP package will contain full features set including I3C-Master-Salve-Combined, I2C-Master-Salve-Combined, I3C2SPI-bridge, I3C2UART-bridge, SPI-Master-Salve-Combined, and UART-Host-Device-Combined in its upcoming versions. Therefore, our customer can implement the I3C Master function within GW1N FPGA family device to communicate with other SPI-Slave and UART devices in the same system directly. This enables customer to adopt the latest high-speed, low-power I3C technology immediately to enhance their products performance, while still able to connect with low cost and legacy SPI/UART sensors or other I2C slave devices in the same system. Thus, fulfills GOWIN’s commitment to the industry: accelerate customer innovation with competitive cost.”
Dr. Song, Ning, CTO & President of GOWIN Semiconductor Corp. continued to comment, “Our GWI3C IP implemented on GOWIN LittleBee family FPGA has the advantages of utilizing low pin count on and enhances features-to-cost ratio. It significantly reduces the number of physical ports connecting to devices in today’s electrical system. In addition, the GWI3C system has features of higher data transfer rate, backward compatible with existing bus protocols, while still able to keep the whole system at low power. All these meet the exact key design criteria in today mobile devices, ADAS and IoT applications.”
I3C Typical Application
- Motion sensing (gyro, accelerometer)
- Environment perceptional sensing (sounds, light, temperature, humidity)
- Bionics sensing (fingerprint, heart rate monitoring, respiratory frequency)
- Communication (NFC, IrDA)
GWI3C Basic Features
- Feasible and programmable: support adjustable data and clock duty cycle in high precision, to achieve wide range data transmission rate,
- Support static addressing
- Support dynamic addressing
- Support I3C address arbitration
- Single Data Rate (SDR)
GWI3C Advanced Features
- Support hot-socket
- Support dynamic addressing in hot-socket
- Supports Slave requests Secondary Master (SDR-only)
- Support In-band Interrupts
- Support Common Command Code (CCC)
GW13C Transmission Rate GOWIN YunYuan EDA fully automates the GWI3C IP (Master-Slave-Combined) design integration with user application. GWI3C IP (SDR-mode) supports data rate up to 12.5Mbps.
GW1N-9 FPGA GW1N-9 IO block integrates a new enhanced configuration IO circuitry which is designed to meet MIPI I3C specification; and these enhanced IO circuitry is on two banks of GW1N-9 IO blocks. Users do not need to make any change on software when using such enhanced IO circuitry. The only thing need to do is to enable I3C mode in the PNR constraints for GOWIN YunYuan EDA.
GWI3C IP Development Board and Reference Design On top of GWI3C IP, GOWIN provides full function I3C development board for customer to develop I3C application off the shelf. Moreover, the I3C development board is designed to be stackable and can be used to communicate with multiple devices at the same I3C bus.
About GOWIN Semiconductor Corp. Founded in 2014, GOWIN Semiconductor Corp., headquartered with major R&D in China, has the vision to accelerate customer innovation world-wide with programmable solutions. We focus on optimizing our products and removing barriers for customers in using programmable logic devices. Our commitment to technology and quality enables customers to reduce the total cost using FPGA on their production boards. Our offerings include a broad portfolio of programmable logic devices, design software, intellectual property (IP) cores, reference designs, and development kits. We strive to serve customers in the consumer, industrial, communication, medical, and automotive markets worldwide.
For more information about GOWIN, please visit www.gowinsemi.com
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