TSMC roadmap reveals 7 and 5nm with EUV, projecting 12 million wafers produced in 2018
Several years of incremental growth erupted into a 13 percent leap in 2017
The law of diminishing returns may prove anything smaller than 5nm difficult
Cadence and Imec making strides, projecting tapeout of 64-bit CPU as early as late 2018
Differing forecasts on 5nm EUV manufacturing process as Imec researchers uncover random defects
EUV lithography faces short-term gains and long-term challenges in resist, actinic inspection, mask and mask pellicles and light sources.
CEO says preparation to insert next-generation EUV lithography into volume manufacturing "shifted into a higher gear" last year.