Edge placement error has emerged as a new challenge to good semiconductor yields, says an expert from Applied Materials who gives guidance for dealing...
The semiconductor roadmap could extend a decade to a 1-nm node or it could falter before the 3-nm node for lack of new resist chemistries
List of EUV related concerns shrinking rapidly as industry collectively pushes onward
Outlines future roadmap, starting with 7nm EUV during second half of 2017
TSMC roadmap reveals 7 and 5nm with EUV, projecting 12 million wafers produced in 2018
Several years of incremental growth erupted into a 13 percent leap in 2017
The law of diminishing returns may prove anything smaller than 5nm difficult
Cadence and Imec making strides, projecting tapeout of 64-bit CPU as early as late 2018
Differing forecasts on 5nm EUV manufacturing process as Imec researchers uncover random defects
EUV lithography faces short-term gains and long-term challenges in resist, actinic inspection, mask and mask pellicles and light sources.