Intel’s Path to 10nm: Past, Present, and Future – Part 2

Article By : Anton Shilov

Intel was ambitious with its 10nm process technology plans — maybe too ambitious. Complications led to substantial delays, and to losing its reputation as the most advanced IC manufacturer in the world. (Part 2)

This is part 2 of a 2-part series on Intel’s fitful progress on a 10nm process.  Part 1 is here.

Intel’s 10nm CPUs So Far: Cannon Lake, Ice Lake, and Tiger Lake

Originally promised to hit the market in the second half of 2016, Intel’s Cannon Lake processor was first delayed to the second half of 2017, and then was quietly launched in limited quantities in 2018. The only Cannon Lake model that we know of — the 15 dual-core Core i5-8121U CPU without integrated graphics — has never reached the mass market and was quietly discontinued in early 2020. Some say that in the H2 2017 – H1 2018 timeframe Intel’s 10nm node were so half baked, that Intel had to significantly redesign its 10 nm process technology for subsequent products. In any case, one SKU and limited availability speak for themselves.


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Intel’s first mass 10nm CPU family — codenamed Ice Lake — was launched in mid-2019 and currently it includes 12 official and semi-custom SKUs with up to four cores as well as Iris Plus G7 graphics with 64 EUs. Frequencies and TDPs of Ice Lake processors range widely (from 9W to 28W), which points that Intel can now produce fairly large 10nm chips that can scale in terms of performance and power (from 2.25 W to 7 W per CPU core).

To enable higher raw performance and improve yields, Intel had to use a revamped version of its 10nm process technology (which TechInsights calls Intel’s 10nm 2nd Gen Logic Process). TechInsights analysts claim that Intel changed Fin architecture to boost performance, altered BEOL process to simplify integration as well as improve performance, change process integration to boost margins, and implemented a different contact layout (think of an improved implementation of COAG on the design level) to improve yields compared to the previous-generation Cannon Lake products.

A 300mm wafer with Intel’s quad-core Ice Lake CPUs with Iris Plus G7 graphics. (Image Source: Intel)

Unlike systems with Cannon Lake, PCs based on Ice Lake are widely available from virtually all major OEMs, so it is obvious that Intel has improved supply of its 10nm chips in the 2019 – 2020 timeframe. Meanwhile, for mainstream notebooks, high performance laptops and gaming desktops Intel offers Comet Lake, another family of CPUs made using its 14nm-class process technology. While it is not exactly surprising that Intel uses 14nm++ processors for gaming machines (keep in mind that this technology is optimized for high clocks), Comet Lakes inside mainstream notebooks as well as lack of compact PCs powered by Ice Lake could indicate that Intel’s 10nm supply was not quite there in H2 2019 and H1 2020.

Recently Intel said that it had started to mass produce its codenamed Tiger Lake CPUs, one of the first products to be made using the company’s 10nm+ process technology. The firm first announced this family back at CES 2020 and indicated that mobile Tiger Lake processors feature general-purpose Willow Cove cores (presumably up to four cores with a 3MB L3 per core), an integrated graphics processor based on the Xe-LP architecture (presumably with up to 96 EUs), and various special-purpose accelerators along with special instructions aimed at AI applications (AVX512_VNNI, GNA 2.0). The improved CPU cores as well as a bigger GPU significantly increase die size of a Tiger Lake processor when compared to an Ice Lake CPU based on official chip shots (ICLTGL). Meanwhile, there are estimates that a premium mobile quad-core Tiger Lake-U has a die size of around 146 mm2, which is actually larger than a die size of Intel’s mainstream quad-core CPUs in the recent years (~120mm2). Some unofficial sources over the Internet indicate that Intel might be preparing a high-performance 45W Tiger Lake-H product with up to eight cores.

Intel plans to debut its Tiger Lake CPUs in the middle of the year and expects over 50 notebook designs based on the new processors to be available by the holiday season. Every major PC OEM has certain expectations about sales of every design they make, there are expensive ones like Apple’s MacBook Pro, and Lenovo’s ThinkPad X1 (keep in mind that Lenovo has not adopted Ice Lake for the latest X1) that are not sold in huge quantities to governments and enterprises, but there are machines like Dell’s Inspiron and Latitude that may sell in hundreds of thousand units per quarter.

Intel’s quad-core Ice Lake CPUs with Iris Plus G7 graphics. (Image Source: Intel)

“The Dell Inspiron line is very popular,” said Jon Peddie, the head of Jon Peddie Research. “Enterprise and the government buy them by the tens of thousands, not ever quarter, but big buys.”

To that end, it is reasonable to expect PC OEMs to sell an eight-digit number of Tiger Lake-based laptops per quarter once they ramp. Sales of laptops in the recent years fluctuated from 40 to 53 million units per quarter, according to Gartner and IDC, so something above 10 million looks like a sizeable number.

What is, perhaps, more important is that back in Q1 2020 Intel’s Tiger Lake reserves were 2X higher when compared to the company’s Ice Lake reserves in Q1 2019, which indicates that Intel is ramping up production of its 10nm+ processors.

“We are seeing a healthy ramp and demand from our customers,” said an Intel’s spokesperson. “We are confident of our capability to meet customer expectations.”

Keeping in mind that premium Tiger Lake CPUs are larger than premium Ice Lake CPUs, it looks like Intel’s 10nm yields are gradually increasing. Meanwhile, Intel predicts that in the second quarter of its 2020 its gross margins will be down 6% to approximately 56%, because of “prequalification reserves associated with the ramp of our next 10nm client product codenamed Tiger Lake, lower sequential revenue, and an accelerated ramp of 10nm products, including isolated client CPUs and 5G SoC,” said Davis.

Intel’s 10nm products are gradually ramping. In addition to client CPUs, the company offers its 10nm-based Agilex FPGAs as well as Atom P5900-series SoC for 5G applications (which has design wins with three major makers of communications equipment). So, while the node is not used for some devices at this point, it is used for a number of others.

“We are seeing very strong demand for our 10nm products, and we are adding capacity for those product lines,” an Intel spokesperson said. “In Client Computing, we are seeing excellent momentum for our 10nm Ice Lake mobile CPU. We will soon introduce the Tiger Lake next generation mobile CPU that already has 50 notebook design wins in what will be shipping in time for the holiday season, and we are planning initial production shipments of Intel’s first 10nm-based Xeon product later this year. Earlier this year we also announced Snow Ridge, the new 10nm Intel Atom P5900 SoC for 5G that has design wins at Ericsson, Nokia, and ZTE.”

Not everything is that rosy though. Intel has moved initial production shipments of its first 10nm+ Xeon processors codenamed Ice Lake-SP from the first half of 2020 to the latter part of 2020, which to a large degree means a delay of the volume ramp and therefore an impact on Intel’s server sales. While we can only speculate about the reasons of the delay, it is understandable that a relatively high defect density has a more drastic effect on yields of large chips than it has on small chips. To that end, while Intel’s 10nm+ defect density and yields may be viable for mainstream mobile CPUs (and maybe even high-performance mobile products eventually), but they may not be there for large high-end datacenter CPUs just yet. Anyhow, Intel does not deny that it is constantly working to improve its 10nm yields and output, so expect its Ice Lake-SP products to arrive at some point.

Another note about Intel’s 10nm node is that the company’s upcoming codenamed Rocket Lake processors for gaming desktops are rumored to be made using the company’s 14nm++ process technology, which is optimized for high frequencies. Also, it will be interesting to see what Intel plans to offer to high-end desktop (HEDT) enthusiasts this year.

Intel’s 10nm: The Fabs

Supply of processors made using a manufacturing technology depends not only on their yields, but also on the number of wafers processed using that technology. To that end, to understand Intel’s 10nm output, we need to understand how many 10nm wafers the company processes and at how many of its fabs are equipped for its 10nm node. In the end, leading-edge node and leading-edge production tools are only viable and profitable when companies use them for HVM.

“High-volume is critical to Intel to service all of their customers,” said an ex-Intel employee. Historically, Intel has been driven by financial performance and yield. At the end day, all companies need to fill their factories which is how they make their money.

In recent years Intel has not been disclosing as much information about capabilities of its fabs (some of which got upgraded to produce more 14nm CPUs) as it used to in the 22nm and 32nm eras. The company was not mum though. Officially, Intel can produce 10nm products at three of its locations: in Oregon, Arizona, and Israel. To that end, Intel’s Oregon location (which includes D1D, D1C, and D1X fabs) is 10nm-ready; so is Intel’s Fab 28 in Israel; and so is Intel’s Fab 42 in Arizona (which is, by the way, 450-mm ready, and, by the way, 450-mm wafers could have mitigated the increasing per square millimeter chip costs, but not without industry support). Three locations (and up to five fabs) look like a rather formidable fleet for high-volume production using Intel’s 10nm node.

“Intel’s 10nm ramp is accelerating with multiple waves of products running or staged,” an Intel spokesperson said. “We have steady, consistent predictable progress on yields with two factories in volume production and, as we see growing demand for these products, a third coming online.”

Intel needs to run its fabs in HVM mode to ensure that they are profitable, so it is not surprising that one of the 10nm-ready fabs is yet to start its high-volume ramp.

“The challenge is to get [a] factory to yield at high levels as quickly as possible,” said an ex-Intel employee. “Once you reach a certain level of sellable production, the factory becomes profitable.”

Summary

Intel made big bets on its 10nm process technology and its Hyper Scaling in a bit to stay ahead of the whole semiconductor industry and produce chips that would be more competitive when compared to products from its rivals. The company had to delay HVM of its 10nm CPUs by 2.5 – 3 years from the original schedule, alter its 10nm technology for its Ice Lake products, and spend billions of dollars on expanding its 14nm output to satisfy demand for its processors in 2018 – 2019. So far, Intel’s 10nm strategy has not paid off. The company does not expect shipments of its 10nm products to crossover with shipments of its 14nm products even by the end of 2020. Furthermore, Intel admitted earlier this year that its 10nm node would not be as profitable as its predecessors.

“It is and extremely challenging business with lots of risk, which is why there are very few major players left,” said a former Intel employee. “I would agree Intel slipped up, but I would not bet against them nor would I expect them to jump ahead by huge margins in the future.”

Intel has learnt its lessons and changed its approach to process development and product design. While developing its next major node, the company makes intra-node improvements to its existing fabrication technologies to extract additional gains. Meanwhile, Intel is working to shrink development cycle of its major nodes to 2 – 2.5 years. Furthermore, the company no longer ties an upcoming architecture to an upcoming process technology, but tends to develop both separately in a bid to make its products using the most viable process technology that exists to ensure time-to-market. Last but not least, with its 10nm, Intel has learnt how to deal with extreme cases of multi-patterning and since the latter is not going anywhere, the expertise will be used in the EUVL era.

“We have gained significant learnings from our initial 10nm ramp and are applying those lessons to deliver a compelling process roadmap that better balances schedule, risk, and the introduction of new innovations,” said an Intel’s spokesperson.

Intel is a huge corporation with big plans and big customers, so it is not going to skip 10nm node in favor of a more advanced one. We are going to see many products on 10nm/10nm+/10nm++. Yet, Intel seems to pin a lot of hopes on its EUVL-based 7nm process technology.

“Looking forward to 7nm, we are returning to a more traditional density scaling factor, introducing fewer interdependent innovations at the same time, reducing design rule complexity, and leveraging a more capable lithography toolset with EUV,” an Intel official said.

Intel’s first 7nm-based product is an HPC-oriented GPU codenamed Ponte Vecchio. While based on a chiplet design relying on EMIB and Foveros technologies, the Ponte Vecchio is indeed a Big GPU meant to scale out in HPC environments. Intel used to start production of chips using leading-edge technologies from small products back in the 14nm and 10nm eras, yet, it chose a different approach with its 7nm process. Perhaps, because it just had to.

“They really cannot afford another 10nm-like screw-up,” said Brookwood. “7nm needs to be a winner. Yields always matter, even if you ignore the economics. You need to have some predictability in the process or you can’t trust the reliability of the resulting output.”

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