Vertical transfer FETs are situated perpendicular to a chip substrate, allowing electric currents to flow vertically.
IBM and Samsung Electronics claimed a breakthrough in semiconductor design based on a new IBM’s architecture touted as enabling an 85-percent reduction in power consumption.
The partners said the Vertical Transport Field-Effect Transistors (VTFET) scheme offers greater power efficiency over FinFET designs, potentially extending Moore’s Law scaling beyond current two-dimensional nanosheet thresholds.
FinFETs are generally designed to lie flat atop a wafer to allow electric currents to flow horizontally. Compared to a planar transistor, FinFETs help reduce power leakage while providing greater device density.
Unlike FinFETs, the companies said VTFETs are situated perpendicular to a chip substrate, allowing electric currents to flow vertically. The companies claim the design could, for example, extend smartphone battery life beyond a week without requiring a charge, according to IBM’s blog post.
Unclear is when VTFET technology will become commercially available. Observers note it could be awhile.
IBM and Samsung aren’t the only chipmakers developing stacked transistors and nanochips. Several others are in the process of developing 4- and 3 nm chips, with plans to scale down to 1-nm chip designs.
For example, Taiwan Semiconductor Manufacturing Co. recently announced plans to produce devices using 4- and 3-nm process technology in 2022.
Stacked transistors are also in development at Intel, which last week announced research initiatives that would enable it to achieve up to a 50 percent increase in the number of transistors it can pack onto a chip, according to Reuters.
Complicating these technology initiatives are continuing supply chain disruptions and resulting chip shortages. Semiconductor materials suppliers have unveiled initiatives to link fab operators with IC chemical and materials suppliers in an effort to unclog supply chains.
For their part, IBM and Samsung failed to provide a timeline for when VTFETs would enter production.
Prior to its VTFET release, IBM announced development of the world’s first 2-nm chip in May. The company doesn’t expect to roll out the technology until 2024.
This article was originally published on EE Times.
Stefani Munoz is associate editor of EE Times. Prior to joining EE Times, Stefani was an editor for TechTarget and covered a host of topics around IT virtualization trends and VMware technologies.