Holst Centre has shown that sALD can deliver semiconductor layers with better performance than physical vapour deposition at the same throughputs.
An easily scalable, atmospheric-pressure process, spatial atomic layer deposition (sALD) could soon become the preferred method for creating large-area thin-film and flexible devices.
Recently, researchers at Holst Centre have shown that sALD can deliver semiconductor layers with better performance than physical vapour deposition (PVD) at the same—and potentially even higher—throughputs.
A key step in producing next-generation ultra-high definition displays is the creation of a highly uniform layer of an amorphous oxide semiconductor such as indium-gallium zinc oxide (IGZO). Today, this is typically done using a PVD technique known as sputter deposition. Sputtering requires expensive vacuum equipment and can also prove difficult to correctly control material composition and thickness over large areas. This results in variable transistor performance, particularly in thin film applications such as displays.
Holst Centre has shown that sALD offers an industry-compatible alternative which improves display performance and at the same time could cut production costs. The team has used the technique to create semiconductor layers with charge carrier mobilities (a key measure of semiconductor performance) of 30 to 45cm2/Vs. This compares to typical mobilities around 10cm2/Vs for sputtering. The sALD layers also exhibited low off current, switch-on voltages around 0V and excellent bias stress stability.
“Spatial ALD offers all the performance advantages of traditional ALD—superior control of layer thickness and composition, large-scale uniformity and unparalleled conformability—but at 10-100 times the speed. So a typical 50nm thick layer can be produced within the standard one-minute window demanded by today’s industrial processes,” said Paul Poodt, program manager, sALD at Holst Centre.
“The performance of sALD means semiconductor layers could become much thinner, enabling even higher throughputs and lower material consumption,” added Gerwin Gelinck, program director, Flexible and Large Area Transistor Electronics at Holst Centre. “In fact, its performance characteristics are preserved even when scaling down the semiconductor thickness to less than 5nm. This can lead to novel semiconductor structures, such as super-lattices, with even higher electron mobilities.”
The Holst Centre team and partners are now taking steps towards the upscaling and commercialisation of these sALD processes and related equipment.