Electromagnetic Simulation Tools Help Optimize Chip Design

Article By : Maurizio Di Paolo Emilio

EM simulation tools can help accelerate on-chip design cycle times.

The fast evolution of electronic technologies has allowed, in recent years, the creation of increasingly compact, performing, and efficient devices. The higher operating frequencies at which different classes of electronic components operate has inevitably entailed major challenges for chip designers, especially related to electromagnetic interference issues.

Samsung Foundry will engage Ansys Inc.’s electromagnetic simulation tools to develop ultramodern designs, including 5G/6G, on the most advanced chips, nodes, and process technologies. Ansys’ simulation solutions will deliver a comprehensive electromagnetic-aware design flow with greater capacity, speed, and integration capabilities for Samsung’s most advanced semiconductor technology, accelerating on-chip design cycle times to boost high-speed connectivity while helping to reduce design error and risk.

Electromagnetic simulation

A way to address electromagnetic interference issues is the use of appropriate electromagnetic simulation tools. Years ago, the requirements for electromagnetic simulation mainly had to do with inductor devices. Chip manufacturers wanted to design and optimize bulky inductors on chip, since those components were originally designed in package. Afterwards, the technology evolved, and chip manufacturers were able to design inductors on chip, and this was their focus as far as electromagnetic simulation was concerned.

That trend—focusing mainly on inductors—continued until engineers started designing chips at higher frequencies. When RF ICs started becoming dominant in the market, electromagnetic simulation emerged as a higher requirement to get the products right on time and on budget.

Ansys’ electromagnetic simulation tools

Ansys, a provider of engineering simulation software and technologies widely adopted by designers, engineers, and researchers across a broad range of industries, offers a complete electromagnetic simulation tool suite that helps chipmakers optimize high-speed connectivity.

“Today, customers are starting to believe more and more in having electromagnetic simulation, mainly due to increasing frequencies and higher data rate signals that exacerbate the electromagnetic crosstalk,” said Kelly Damalou, lead product manager for the on-chip electromagnetic simulation portfolio at Ansys, in an interview with EE Times.

Recently, Samsung Foundry has chosen Ansys’ electromagnetic simulation tool suite to develop state-of-the-art designs, including 5G/6G, on the most advanced process technologies.

The superior capacity, speed, and integration capabilities of Ansys’ software tools will enable Samsung designers to accelerate electromagnetic design cycle times by a factor of 10, thus shortening the time to market.

Samsung designers will leverage Ansys’ electromagnetic design tools, Ansys RaptorX, Ansys VeloceRF, and Ansys Exalto, to help reduce time to market by two to three weeks on smaller designs and up to two months for complex designs:

  • VeloceRF: an inductive device synthesis and modelling tool that supports advanced nodes as low as 3 nm and integrates with leading EDA platforms (Figure 1)
  • RaptorX: a high-capacity electromagnetic solver that is optimized for silicon applications like high-speed RF ICs, digital SOCs, and 2.5D/3D ICs.
  • Exalto: an electromagnetic-aware parasitic extraction software solution that enables IC design engineers to accurately predict electromagnetic coupling effects during the signoff phase.

With automation capabilities that optimize calculations and modelling, coupled with larger capacity, Ansys’ software will allow the Samsung team to design at faster speeds with higher fidelity.

Graph of Ansys VeloceRF, one of Anysys' electromagnetic simulation tools
Figure 1: Ansys VeloceRF shortens the design cycle by greatly reducing the time it takes to synthesize and model complex spiral devices and T-lines (Source: Ansys)

By extracting lumped-element parasitics and creating a correct model for electrical, magnetic, and substrate coupling, Ansys Exalto, as shown in Figure 2, is a post-LVS RLCk extraction software solution that enables IC designers to precisely capture unknown crosstalk among various blocks in the design hierarchy. Exalto can supplement the RC extraction tool of your choice and interfaces with the majority of LVS solutions.

Image of on-chip transformers in a low-noise amplifier
Figure 2: On-chip transformers in a low-noise amplifier (Source: Ansys)

Starting next year, Ansys’ customers will be able to further improve the design cycle time by a factor of two on a single node, and by a factor higher than two by adopting a distributed architecture and executing simulation on eight nodes at the same time, according to Damalou.

RF designs, including 5G and 6G, are very challenging. The biggest challenge moving from one telecommunication protocol generation to the next is that the devices need to support the older protocols, as well.

“If you think about all those transceivers communicating on different frequencies, but very tightly integrated one next to the other, then you can imagine that this is an electromagnetic crosstalk nightmare”, Damalou said.

Engineers not only need to optimize the design for one of these communication protocols (e.g., 6G), but they also must make sure that it doesn’t get coupled and crosstalk or interfere with the neighbouring transceivers, such as 5G, 4G, and 3G. This is one of the greatest challenges from an electromagnetic perspective.

The other challenge is related to the high frequencies that make the phenomena more intense. Year after year, electronic technology continues to evolve, with production processes that go from 7, 5, and then 3 nm.

“RaptorX is the only solver that can analytically model the advanced layout dependent effects that have to do with the fabrication of 7-, 5-, and 3-nm process”, Damalou said.

Among Ansys’ customers, there are also companies working on high-power applications. Even though technologies and materials are different, they face the same challenges as high-speed chipmakers.

RaptorX, as well as all Ansys’ electromagnetic portfolio tools, use the technology as described in the ICT or iRCX files as they come from the foundry. These files contain relevant information, such as dimensions of the layer thicknesses, variations of the thicknesses, dielectric constants, temperature coefficients, and more. The electromagnetic simulation tools can also solve Maxwell’s equations to calculate the electromagnetic model by providing the layout.

“From generation to generation of our tools, we have had problems and bugs, of course, and we have built a very strong validation and quality assurance framework with the thousands of data points that come from either customers’ silicon or from our internal benchmarks with Ansys golden reference solvers,” Damalou said. “This guarantees the accuracy of the RaptorX electromagnetic models. RaptorX has been certified by all major foundries for several of the most advanced processes and for 2.5D and 3D IC architectures.”

Roadmap

Ansys’ roadmap includes further improvements that have to do with the capacity and speed of the workflows, as well as with the development of a tool called RaptorQu launched last year. RaptorQu is an electromagnetic solver focused on super conductive silicon for quantum processors. It uses the same technology and capacity as RaptorX, just with a different focus on superconductors.

“This is another major focus, and we believe it will be worth the investment that we see in quantum computing,” Damalou said. “There will be huge developments, and we will see commercial results in maybe less than 10 years.”

 

This article was originally published on EE Times.

Maurizio Di Paolo Emilio has a Ph.D. in Physics and is a Telecommunications Engineer. He has worked on various international projects in the field of gravitational waves research designing a thermal compensation system, x-ray microbeams, and space technologies for communications and motor control. Since 2007, he has collaborated with several Italian and English blogs and magazines as a technical writer, specializing in electronics and technology. From 2015 to 2018, he was the editor-in-chief of Firmware and Elettronica Open Source. Maurizio enjoys writing and telling stories about Power Electronics, Wide Bandgap Semiconductors, Automotive, IoT, Digital, Energy, and Quantum. Maurizio is currently editor-in-chief of Power Electronics News and EEWeb, and European Correspondent of EE Times. He is the host of PowerUP, a podcast about power electronics. He has contributed to a number of technical and scientific articles as well as a couple of Springer books on energy harvesting and data acquisition and control systems.

 

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