Efinix's Efinity RISC-V Embedded Software IDE simplifies the creation, management, and debug of projects running on the Efinix Sapphire RISC-V core.
Efinix Inc.’s Efinity RISC-V Embedded Software IDE, powered by the Ashling RiscFree IDE, simplifies the creation, management, and debug of projects running on the Efinix Sapphire RISC-V core.
Through tight integration with the Efinity design environment, the new IDE provides an intuitive way for designers to import projects created for the revolutionary Trion and Titanium FPGAs and rapidly develop embedded RISC-V code in a rich debug environment.
“The Efinity RISC-V Embedded Software IDE delivers a truly intuitive design workflow for our best-in-class Sapphire RISC-V core,” said Jay Schleicher, Efinix SVP of Software Engineering. “Our collaboration with Ashling pairs the market leading development and debug environment with our efficient and disruptive FPGA technology to speed time to success in a wide range of embedded compute applications.”
The Efinity RISC-V Embedded Software IDE is a turn-key package that delivers enhanced debug in both bare metal and FreeRTOS environments. Integration with Efinity projects delivers design flow automation for register level debug of both CSR and peripheral registers within the FPGA SoC while FreeRTOS task and queue lists provide application-level visibility. The QEMU emulation support, included in the IDE, offers workflow flexibility enabling SoC debug in the absence of target hardware.
“RiscFree is synonymous with RISC-V and one of the market leaders in the RISC-V debug space,” said Hugh O’Keeffe, Ashling CEO. “Combining RiscFree with the clear advantages of the Efinix Sapphire RISC-V core and Quantum Fabric delivers an efficient workflow with enhanced design and debug visibility for fast time to market with highly optimized, embedded compute designs.”