EdgeQ Samples 5G Basestation-on-a-Chip

Article By : Sally Ward-Foxton

EdgeQ's software defined basestation chip offers acceleration for 5G and AI functions.

EdgeQ, the startup making basestation-on-a-chip silicon and software for 5G deployments, is now sampling its chip and phy software. The company has also released a few more details about its silicon and software stack.

According to EdgeQ CEO Vinay Ravuri, the company has had its chip back in the lab for “about six weeks”.

“Within two weeks we actually got full Linux running and it looks solid, and we are able to send 5G traffic through the chip,” Ravuri told EE Times.

EdgeQ’s idea is to integrate the various chips that make up a basestation onto one piece of programmable silicon, thereby reducing the overall power consumption and cost of building a basestation.

EdgeQ’s evaluation card features its chip, plus baseband and RF components. Loading the EdgeQ chip with different firmware can change the system on the card from a distributed unit (DU) to a radio unit (RU) or access point (gNodeB).


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The chip itself features a 50-core signal processor. The 50 RISC-V cores are identical and are dynamically programmable to process the phy layer features which are implemented in software. The core is licensed from Andes and customized with EdgeQ’s instruction extensions specific to 5G and AI workloads.

EdgeQ RISC-V core diagram
EdgeQ customised an Andes RISC-V core with instruction extensions for 5G and AI maths (Source: EdgeQ)

Instructions added by EdgeQ speed up mathematical operations including fast fourier transforms (FFT), complex modulations, approximators for non-linear functions, matrix decompositions and equalization. Some of these operations are common to 5G and AI workloads; the chip can be used to accelerate both.

EdgeQ’s chip also features a network on chip (NoC), RF interface, forward error correction (FEC) acceleration, protocol accelerator for L2/L3 and secure boot. A host processor, which is 8x Arm Neoverse cores, performs control and configuration functions such as user monitoring, traffic statistics, diagnostics and upgrading software on the chip. Ravuri said the decision to stick with Arm cores here (rather than move to RISC-V) is so that Tier 1 OEM customers could retain software they have already written for these functions that run on Arm.

EdgeQ chip
EdgeQ’s basestation-on-a-chip SoC has an Arm Neoverse 8-core host (Source: EdgeQ)

Phy software
5G deployments rely on phy (physical layer) software which governs the essential protocols and features of 5G. While most silicon vendors supply reference software for the physical layer, customers must typically spend time developing their own implementations. This is a particular concern to companies taking advantage of open radio access network (O-RAN) technology, who may not be cellular companies.

“Almost all hardware companies today only do [hardware],” Ravuri said. “The [phy] layer is left up to the customer – we think that is the problem… If you did it that way, your customers would end up being Ericsson and Nokia again.”

EdgeQ has developed production-ready phy software for its chip which can be deployed out of the box, including functionality such as beamforming, channel estimation, massive MIMO and interference cancellation. For customers who want to add their own differentiation, the EdgeQ phy layer is programmable and extensible and can address the wide variety of 5G applications from Industry 4.0 to telco-grade macro cells.

EdgeQ Stack
EdgeQ’s software stack. EdgeQ can provide complete phy (layer 1) software for its chip, while layer 2 and 3 software can be provided by partner companies (Source: EdgeQ)

EdgeQ operates a silicon-as-a-service model, meaning customers pay a nominal price for the chip which comes with a basic 5G implementation. Over time, customers can unlock more sophisticated features (such as low latency for AR/VR, location services, RAN sharing, slicing, machine learning, or custom functions for example) which are delivered via updated firmware.

“It became clear that 5G is so broad that not everybody wants to pay up front for everything,” Ravuri said. “They don’t want to pay for sophisticated features up front because they may not know what they’ll use it for.”

The additional features are “pay-as-you-go” meaning they can be switched off when not needed any more, saving customers money.

How are customers responding to this business model so far?

“It’s been a very pleasant experience on that front, I thought we might see friction or resistance, but no,” Ravuri said. “It’s true that [customer] supply chains aren’t set up for chips like this. One customer liked this model, but didn’t know how to manage a chip vendor through this model because they hadn’t done that before. They’ve opted to pay the subscription [for the features they need] up front instead.”

EdgeQ already has a design win with “a large North American OEM” who have committed to productizing the EdgeQ chip, Ravuri said.

The company’s headcount has grown to 120 people with offices in Santa Clara and San Diego, Calif. and Bangalore, India.

Samples of the EdgeQ chip, EdgeQ eval boards and phy software are available now.

This article was originally published on EE Times.

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