Differentiation Through the Chip Design and Verification Flow

Article By : Rick Carlson, Verific Design Automation

Huge tech companies relatively new to IC design are demanding tools customized at higher levels of abstraction and not widely shared with their competitors.

The makeup of the semiconductor industry is evolving and expanding once again. This time it’s a variety of companies, including tech giants Apple, Amazon, Facebook, Microsoft and Tesla, not known previously to be in the chip development business, instigating the change. They are hiring experienced engineers to design better performing, power-efficient computer chips for all kinds of applications, from networking and cloud to autonomous driving. Along the way, they are ripping up the pages of the traditional semiconductor playbook and putting in place their own individual guides to semiconductor design. The result is custom-made chips rather than using a generic chip to fit their requirements.

These system companies are also quietly and, perhaps secretly, keeping their projects under wraps and building a portfolio of intellectual property (IP) that they want to keep secure and differentiated from their competitors. They want control and the ability to customize their own IP. They are also looking for vendor partners willing to take an extra step to ensure their chips are tailored to their specific applications. It’s apparent that these companies want strategic, multi-year agreements with partners that won’t share their differentiation and pay more than a typical proposal, accomplished if sales managers are creative.

Yes, the traditional steps through the system design process as we know them are changing. Perhaps the first to notice the trend is where electronics begins –– the computer aided design (CAD), now more commonly known as the electronic design automation (EDA) or electronic system design (ESD) community. This scenario is an evolution for a community serving the semiconductor industry with design tools since the 1980s.

It all started with support for custom silicon designs, then moved to semi-custom design and ASICs and the rise of fabless semiconductors. A more recent trend fully embraced about 15 years ago, blocks of IP are dropped into designs, either developed internally or licensed from an IP supplier, such as Arm, and often function as the company’s not-to-be-shared differentiation. IP changed the way chips are designed, from handcrafting every function at the transistor level to using building blocks, ushering in the era of system on chip (SoC). Once again, tools from this community were developed to meet the need.

Today, the custom approach has moved to design and verification flows to serve as differentiators. And, why not? Design and verification flows are a necessary part of chip design and include a combination of point tools that are generic by design to appeal to a broad community of engineering groups. Any customization is done so internally.

Differentiation or not, all semiconductor companies rely on point tools to ensure their design and verification flows meet industry standards. In many instances, new system houses want tools customized at higher levels of abstraction and not widely shared with their competitors. In the past, if the tool vendor made the change, the change on behalf of one customer became a feature in the next version of the software tool within six months.

The best analogy for the change sweeping through the design tool provider community may be the after-market auto dealer that customizes a car delivered with standard features. The aftermarket will soup it up with the features the owner wants tailored to his or her explicit needs.

In the semiconductor industry, a design tool company could be the after-market auto dealer meeting differentiation and adherence to standards by offering a software development platform implemented in design and verification flows. The platform could empower a company to customize its semiconductor design flow for its specific applications with no concern that the customization will be shared externally. This is an advantage for any semiconductor company wary of competitors identifying and replicating its design flow or implementation techniques.

The scenario is playing out in large and small chip development companies. One example is a spinout startup from one of new system design companies. It is developing chip solutions to accelerate the performance of servers. It wanted to optimize its design for performance and did so by refining the design at a higher level of abstraction than gate or register transfer level.

Design tool companies willing to partner, customize and/or optimize their software platform to specific needs provide high value. Smaller, more nimble companies can offer a more tailored approach while larger, more established companies will catch up since the trend is happening throughout the semiconductor design ecosystem.

For now, the tech giants and system design companies are sticking to the chip design and verification part of the supply chain and are not investing in manufacturing and foundries. It’s no wonder at a cost that could exceed $10 billion and a time investment of several years.

In the end, customization is market segmentation. Design tools modify but do not change the tool flow. They enhance it with a special insert for new IP, new functionality that improves or optimizes a design to make a unique end product without changing or altering anything downstream. Customization at the higher levels of abstraction have no impact on production, either, other than a better, more efficient power or performance design.

As this trend continues moving through the semiconductor industry and upending the way in which chips are designed and verified, companies large and small are turning to their design tool suppliers, exploring new business models, partnerships and differentiators to retain their competitive edge.

This article was originally published on EE Times.

Rick Carlson is vice president of worldwide sales for Verific Design Automation. A veteran of the electronic design automation (EDA) industry, he joined Verific from AccelChip, where he held a similar position. Prior to AccelChip, Carlson held positions as vice president of sales for Averant, Synplicity (acquired by Synopsys), Escalade (acquired by Siemens) and EDA Systems. He co-founded the EDA Consortium (now the ESD Alliance, a SEMI Technology Community) in 1987. He holds a Bachelor of Science degree in Mathematics from Illinois Institute of Technology (IIT) in Chicago.

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