TechInsights' Jeongdong Choe breaks down DDR5 memory technology released by market leaders Micron, Samsung, and SK Hynix.
We are entering the era of DDR5 memory. Major DRAM players Micron, Samsung and SK Hynix are releasing their first DDR5 memory products as demand for DDR5 is significantly exceeding supply.
DDR5, the new standard in DRAM, addresses demand for computing and high bandwidth for use case like AI, machine learning and data analytics.
Compared to DDR4 data rates, which generally operate in a range from 1,600 to 3,200 MHz, DDR5 provides both data and clock rates that double the performance up to at least 7,200 MB/s. Additionally, DDR5 lowers the operating voltage to 1.1V.
During development, engineers enhanced the capabilities of DDR5, adding and modifying several advanced features including increased prefetch from 8 to 16, more banks and bank groups to increase bus efficiency. They also added new write pattern and refresh modes, the addition of the decision feedback equalizer, and per–DRAM addressability. On–die ECC was also included to strengthen the on–chip RAS while reducing controller burdens.
Those innovations represent another step toward unlocking the value in future data–centric applications.
The first DDR5 products hit the market with UDIMMs, running at or between 4,800 MT/s and 5,600 MT/s. That represents a 33-percent increase in data rate over top-end 3,200 MT/s DDR4 DIMMs in current high–performance servers. For reference, Everspin 1 GB pMTJ STT–MRAM stand–alone DDR4 chips operate at 1,333 MT/s with 15 ns CL and 135 ns tRCD. Recently released GDDR6 devices are running at 16,000 MT/s, LPDDR5 devices at 6,400 MT/s and HBM2e devices at 3,600 MT/s, including the latest version of Nvidia’s flagship data center GPU, the A100 with 80 GB.
JEDEC recently updated the DDR5 SDRAM standard (JESD79–5A) to meet cloud and enterprise data center application requirements, providing developers with twice the performance and improved power efficiency. For higher density and higher performance, DDR5 is expected to adopt the most advanced DRAM cell technology nodes such as D1z or D1a (D1α) generation. They represent the third or fourth generation of the 10–nm class DRAM nodes. DDR5 memory incorporates several innovations and a new DIMM architecture which provides a speed grade jump while supporting scaling.
Comparing DDR5 products
TechInsights recently compared DDR5 die size, bit density, DRAM cell size and design rules for DDR4–3200 and DDR5–4800 chips from Micron, Samsung and SK Hynix. Specifically, we looked at the TeamGroup ELITE DDR5 16 GB UDIMM series in Micron DDR5 devices; G.SKILL Trident Z5 DDR5 memory (F5–5600U3636C16GX2–TZ5K) in Samsung DDR5 devices; and SK Hynix 32 GB HMCG88MEBUA81N DDR5 UDIMM PC5–4800B module.
Samsung has announced the high–k metal gate (HKMG) process-based DDR5 memory module. The company adopted the HKMG process in its GDDR6 memory in 2018, an industry first, before expanding to DDR5 memory.
SK Hynix has also announced a new 24-GB DDR5 chip developed with the cutting–edge D1a nm technology utilizing the EUV lithography. When it comes to bandwidth, DIMMs provide 38.4 GB/s or 44.8 GB/s compared to 64 GB/s for GDDR6 devices and 460 GB/s for eight–die HBM2E devices from SK Hynix.
Micron, Samsung and SK Hynix are producing in volume their first DDR5 components operating at 4800 MHz or 5600 MHz. We expected to see DDR5 devices built on industry–leading process technology nodes D1a or D1α. The DDR5 DRAM die and cell/peripheral designs, however, don’t appear to have fully matured yet. The first DDR5 chips adopted previously existing technology nodes or design rules, including Samsung D1y, Micron D1z, and SK Hynix D1y. Table 1 shows a comparison of the first DDR5 devices.
The TeamGroup ELITE DDR5 UDIMM with 16 GB DDR5 devices include DDR5 MT60B2G8HB–48B:A chips produced by Micron (Y32A die). The G.SKILL Trident Z5 DDR5 memory F5–5600U3636C16GX2–TZ5K includes Samsung DDR5 K4RAH086VB–BCQK devices (K4RAH046VB die). The SK Hynix includes 32 GB HMCG88MEBUA81N DDR5 UDIMM PC5–4800B module (H5CNAG8NM die). We added die images to the table above for reference.
Micron applied its M-D1z process technology node, while Samsung and SK Hynix adopted D1y cell processes (S–D1y and H–D1y). Hence, the DDR5 die size from Micron (66.26 mm2) is smaller than Samsung’s (73.58 mm2) and SK Hynix’s (75.21 mm2).
Micron has more advances in cell size and bit density on DDR5 compared to Samsung and SK Hynix. In fact, Micron M–D1z process technologies are more advanced than Samsung’s and SK Hynix’s D1y process, including 15.9 nm DR, poly–Si/TiN cell gate without W material, smaller active/WL/BL pitches, advanced SNLP process and SN capacitor process and materials as well as a CuMn/Cu metal process.
TechInsights compared DDR5 die size, bit density, DRAM cell size, and DR of DDR4–3200 and DDR5–4800 chips from Micron, Samsung, and SK Hynix as shown in Figure 1 through Figure 4.
All have a 16-GB memory capacity per die, making comparisons easier. For 16-GB DDR4–3200 chips, Micron and SK Hynix used the D1z process node, while Samsung’s 16-GB DDR4 uses the S–D1x node. Micron and Samsung retained the same die size and bit density from their DDR4–3200 chips, while SK Hynix increased die size by 40 percent and decreased bit density by 28 percent due to the older process node used on DDR5 (H–D1z for DDR4 vs. H–D1y for DDR5).
As for DRAM cell size and cell DR on DDR5, Micron kept the DDR4 cell size while Samsung decreased cell size by 8.7 percent and DR by 5 percent. On the other hand, SK Hynix increased cell size by 11.8 percent and DR by 5.7 percent. Although the maximum speeds of today’s DDR4 and DDR5 are 3.2 GB/s and 4.8 GB/s, respectively, DDR5’s bandwidth will be able to stretch out to 8.4 GB/s in future iterations.
TechInsights expects more advanced and disruptive DDR5 products to hit the market in 2022 and 2023, including products offering higher bandwidth and performance, including DDR5–6400 chips (> 50 GB/s @96 GB DIMMs) with 24 GB or 32 GB or even multi–die DDR5 devices combined with TSV DRAM stacks.
Manufacturers are targeting higher density, higher capacity, higher speeds, higher energy efficiency and better reliability for DDR applications. Advanced DDR5 technologies are already in development, and the market will continue to grow until next-generation DDR6 memory arrives in late 2024 or early 2025.
Regarding the technical specifications of DDR6 memory, the data transfer speed will be doubled compared to DDR5. For example, the JEDEC module can run at approximately 9,600 MB/s for DDR6–9600. In addition, DDR6 will also double the number of memory channels per module, with four 16–bit channels combined in 64 memory banks.
This article was originally published on EE Times.
Jeongdong Choe has more than 20 years of experience on semiconductor process and device integration including NAND Flash, DRAM, logic and advanced memory devices at Samsung and SK-Hynix. He works at TechInsights as a senior technical fellow focusing on memory/logic products, architecture, roadmaps and technology.