2022-01-12 - ACN Newswire

Tanaka Denshi Kogyo to Establish New Plant in China

Tanaka Denshi Kogyo will establish a new plant in Hangzhou, China, for the production of aluminum bonding wires for power…

2021-12-29 - Nepes Laweh Corp.

Nepes Laweh Sets New Industry Benchmark with 600mm Large Panel Fan-Out Volume Production

Nepes has successfully produced the world's first 600mm x 600mm large panel level packaging (PLP) using Deca's M-Series fan-out technologies.

- Industrial Technology Research Institute

Heterogeneous Integration Chiplet System Package Alliance Established

The Hi-CHIP alliance will help create a complete ecosystem covering package design, testing and verification, and pilot production.

- Stefani Munoz

Applied Materials, IME Extend Hybrid Bonding Research

Applied Materials and Singapore's IME will extend research via a combined $210 investment aimed at advancing hybrid bonding technology.

2021-12-16 - TSMC

TSMC Newest N4X Process Targets HPC Products

N4X is the first of TSMC’s HPC-focused technology offerings, representing ultimate performance and maximum clock frequencies in the 5-nanometer family.

2021-11-23 - Samsung Electronics Co. Ltd

Samsung Electronics Expands Portfolio of ‘Green’ Chips

Five memory products achieved carbon reduction certification, while automotive LED packages received carbon footprint verification.

2021-11-09 - Amkor Technology Inc.

Amkor Plans New Vietnam Factory to Expand Advanced Packaging Technology Capacity

Amkor plans to build a state-of-the-art smart factory in Bac Ninh, Vietnam to expand its advanced packaging technology capacity.

2021-10-14 - Xperi Holding Corp.

YMTC Licenses Xperi’s Hybrid Bonding Technology

Xperi has licensed its Direct Bond Interconnect (DBI) hybrid bonding portfolio to YMTC for its 3D NAND memory products.

2021-06-29 - Keesjan Engelen

Taiwan Electronics Update

Taiwan really contributes more value to the iPad Pro than accounted for.

2021-06-02 - Don Scansen

What to Expect at the VLSI Technology Symposium

The papers from the upcoming VLSI Technology Symposium suggest there's some agreement on general direction, but little agreement on terminology.

2021-05-28 - Global Unichip Corp.

GUC Unveils Die-on-Die Interface IP Using TSMC N5 and N6 Process

GUC has announced GLink-3D die-on-die interface IP using TSMC’s N5 and N6 processes, and 3DFabric packaging technology for AI, HPC,…

2021-04-01 - Ravi Mahajan

Optimizing Package System Integration Maximizes System Performance

Closer collaborations between package and system designers to optimize package system integration will help maximize system performance.