Teardown: A Look at IBM Power9’s Micro-Architecture
A teardown of IBM's Power9 14HP DTC SOI FinFET eDRAM shows several significant technological changes from the company's preceding Power8.
Samsung Likely to Unseat Intel as Top Chip Vendor
Samsung, which has nearly half of the global DRAM market, is likely to crush smaller rivals after more than doubling…
NAND Market Expected to Regain Balance in 2018
The NAND flash market is expected to move into better equilibrium in 2018 as the production of NAND ramps up…
Western Digital Still Hopes to Block Toshiba Chip Sale
Western Digital still believes it can block the sale of Toshiba's chip unit to a consortium led by Bain Capital…
Memory demand boosts Micron’s sales
Favourable pricings for DRAM and NAND have bolstered Micron's market performance.
Toshiba unveils 1.5TB QLC 3D Flash
Toshiba has claimed the first 1.5TB QLC 3D Flash memory. The prototype uses a die with a capacity of 768Gb…
Embedded MRAM moves into 22nm node
eMRAM has the ability to retain data through solder reflow at 260°C, and for more than 10 years at 125°C,…
nvNITRO operates at 1.5M IOPS with 6μs latency
Initial applications for nvNITRO accelerators include “anywhere you need very fast write speeds coupled with very low latency,” according to…
Everspin’s nvNITRO targets evolving MRAM market
Initial nvNITRO accelerators will be available in capacities of a 1GB and 2GB, based on Everspin’s 256Mb DDR3 ST-MRAM.
Flash memory adopts 3b-per-cell TLC tech
Toshiba’s 64-layer device with 3b-per-cell TLC BiCS Flash Device bundles 1TB 3D flash memory capacity and performance.