Winning three awards at the recent EE Awards Asia underscores Arm's dedication to developing the most powerful, highest efficient CPU IPs in the industry.
Cadence has optimized Dolby car experience technology to run on the Tensilica HiFi DSP for audio playback of Dolby Atmos for cars.
PUFsecurity's PUFcc crypto coprocessor takes care of security-related affairs within a system and allows the CPU to perform its primary functions safely.
TI's efforts in the high-voltage and automotive markets in Taiwan and Southeast Asia have been recognized by the region's engineering community as the company wins in five product award categories at EE Awards Asia 2022.
The Cadence IP for GDDR6 is silicon proven on TSMC’s N5 process technology, exceeding Cadence's previous 16Gbps designs.
QuickLogic is partnering with MA Technology to make its eFPGA IP available in Taiwan.
NeoLogic's chip design technology is fully compatible with the existing manufacturing as well as EDA tools so it can seamlessly fit into any PnR design flow as well as chip fabrication.
Does Qualcomm's existing architecture license cover cores previously developed at Nuvia?
The electronic system design (ESD) industry revenue increased by 12.1% YoY to $3.54 billion in Q1 2022, according to the ESD Alliance.
Cadence has expanded its Tensilica ConnX family with the debut of two new DSP IP cores for embedded processing in the automotive, consumer and industrial markets.
Cadence has extended its collaboration with Arm to accelerate mobile device silicon success using its digital and verification tools and the new TCS22.
Cadence's PHY and Controller IP for PCIe 5.0 specification in the TSMC N7, N6 and N5 process technologies have passed certification tests.