Siemens plans to add Fractal's technology to the Xcelerator portfolio as part of its EDA IC verification offerings.
Nanya Technology has selected Synopsys Custom Design Platform to accelerate design of next-generation memories for mobile, automotive, consumer, and industrial markets.
In addition to previous collaboration for multiple technology nodes starting from 40nm down to 7nm, Aprisa is now qualified to run on TSMC's highly advanced N6 technology.
Cadence's Pegasus Verification System has achieved certification for Samsung Foundry's 5nm and 7nm process technologies.
Synopsys is offering a unified approach to SoC design, accommodating complex mixes of analog, digital and mixed signal components.
Tianjin Phytium Information Technology Co. is one of seven companies that the US put on its Entity List after the Washington Post reported that China used American and Taiwanese chip technology to create the world's first hypersonic missiles.
Cadence Design Systems Inc. has launched the Palladium Z2 Enterprise Emulation and Protium X2 Enterprise Prototyping systems to handle the exponentially increasing system design complexity and time-to-market pressures.
A cohesive system takes hardware, software, and system verification to the next level of emulation and prototyping platform innovation.
As system complexity continues to rise, breakthroughs are needed if EDA is to keep ahead of SoC design challenges.
IBM research ecosystem promises full-stack innovation for game-changing AI chips, but its goals are lofty...
Synopsys acquisition of Moortec addresses silicon lifecycle management trend...
In light of Apple’s M1 processor announcement recent;y, let me ponder why Apple passed on the chiplets, and where I believe chiplets make more sense.