At Ayar Labs, It’s All Coming Together

Article By : Sally Ward-Foxton

An EE Times Exclusive interview with Ayar Labs CEO Charlie Wuischpard explores the future of optical chip-to-chip interconnects.

For Ayar Labs, the company best known for optical chip-to-chip interconnects, the industry-wide adoption of chiplets couldn’t have come at a better time. These silicon and packaging technologies enable Ayar’s silicon photonics chiplets, which convert from the electrical domain into the optical domain for chip-to-chip communication, to get around copper links’ bandwidth bottlenecks, reduce power and latency, and extend reach.  

“It’s good to be lucky,” Ayar Labs CEO Charlie Wuischpard said with a laugh during an exclusive interview with EE Times at Ayar’s Santa Clara, California-based headquarters.  

“I wouldn’t say we foresaw [chiplets], but certainly it provides a landing zone for the technology,” he said. “If not for the chiplet, we’d be making the argument to try and embed this set of IP either into the silicon or maybe as a standalone module outside, which in either case would have had its additional challenges.”  

Ayar Labs’ chiplets sit alongside processor die on the same interposer, allowing optical connection to other chips in the system (Source: Ayar Labs)

Chiplets offer the opportunity to develop specialized functions on different process technologies, then package them together on a silicon interposer in a tightly integrated way. This means Ayar’s TeraPHY silicon photonics die, which uses a 45-nm GlobalFoundries process, can be co-packaged with a customer’s large processor die, which might be on a cutting-edge 7-nm process (or below).

Rather than integrating Ayar’s entire TeraPHY chiplet onto the processor die, in the future, Ayar may license its electrical blocks or sub-blocks to customers to put onto processor chiplets as an alternative to developing custom solutions, Wuischpard said. A more likely scenario would be to further separate the optical and electrical parts of Ayar’s design into two chiplets for certain applications.

Both options stay on the table, “and we’re getting more of those kinds of requests coming in,” he said, suggesting that a customer might not need the 2 Tbps bandwidth Ayar’s current chiplet offers. For example, a sensor application might need to move to optical links for ultra-low power data movement, perhaps preferring a drop to a few hundred Gbps to enable ultra-low power in a tiny footprint.

Next-gen chiplets

Charlie Wuischpard (Source: Ayar Labs)

Ayar is still deciding what’s next on the product roadmap, but it could include adjusting levers, such as the number of wavelengths used (currently eight), the bandwidth enabled by each wavelength (currently 32 Gbps), and the number of macros (transmit-receive pairs, currently eight per eraPHY chiplet).

On the laser side, Ayar has plans underway to support multiple TeraPHY chiplets with a single laser source. This makes sense as the laser is an expensive part of the system. But there are trade-offs, Wuischpard said, including having to relying on just one source without redundancy.

“It’s a multivariate problem, there’s a lot going on,” he said. “We have to try to pick the best route forward among the choices, and part of that is getting the right customer feedback.”

Far-future possibilities for Ayar’s technology roadmap include the potential for use in quantum computers where the heat lost from copper wires can cause problems. Another possibility might be embedding quantum security capabilities into optical links.

“We’ve got photons… there are things we can do with those photons, when we’ve got them under our control,” he said.

While Wuischpard didn’t go too far into the details, one possibility might be implementing quantum key distribution (QKD) in short haul optical links. With QKD, the quantum state of successive photons traversing the link acts as a quantum-proof encryption key.

Ecosystem building

When we talk about the inevitable change from copper to optical chip-to-chip interconnect, the technology, while difficult, is only a piece of the puzzle. Commercializing that technology and building an ecosystem that allows it to thrive is crucial. This ecosystem is a key strategic priority for Ayar. The company must make sure its chiplets can fit into all the appropriate packaging flows, while simultaneously lining up its customer base.

Ayar counts the venture capital arms of key suppliers (Applied Materials and GlobalFoundries) and key customers (Nvidia, Intel, Hewlett Packard Enterprise, and Lockheed Martin) in its group of strategic investors.

Does this represent a critical mass, or are more potential customers necessary at this stage to make an ecosystem?

“Any one of those companies has the volume to enable a company like us to thrive,” Wuischpard said. “But our aspirations are bigger than that.”

Ayar wants to make a pervasive standard for everyone to use to help accelerate the widespread adoption of optical chip-to-chip links.

“I don’t think there’s anybody close to us as an independent who could provide this, but [we’re] trying to figure out how a small company establishes a standard that can be used by all,” he said.

A standard would mean reduced need for proprietary solutions, which Wuischpard considers could be Ayar’s main competitors today.

“One of the big companies could say, ‘This is too important, I’m just going to throw a lot of engineers at it, and do it myself’,” he said. “But then you have to ask: Would that just be for their benefit, or will it have interoperability with the rest of the industry? It leads back to an industry desire to be more broadly adopted, so that it’s truly an industry solution, rather than a specific one-customer solution.”

Bring on the competition

Industry-wide adoption would mean more than just Ayar making the I/O chiplets.

Wuischpard draws a parallel with Intel licensing x86 to AMD, noting that there may be a point in time when the company should facilitate creation of some competitors.

“In the long run, having another chiplet supplier that’s similar or equal would probably not be the worst thing, if we can monetize it in some fashion,” he said. “Those conversations are still underway.”

Wuischpard noted that Ayar has already created a multi-source agreement on the laser sources required to power its optical links. Laser manufacturer Sivers Photonics is already producing the Ayar Labs SuperNova 8-wavelength distributed feedback laser array as part of this agreement.

Welcoming the UCIe standard

Ayar is eagerly looking forward to the adoption of the unified chiplet interconnect express (UCIe) standard, which is designed to enable a chiplet ecosystem where heterogeneous chiplets can be mixed-and-matched. (UCIe includes the memory-to-processor chiplet standard compute express link (CXL)).

Today, Ayar uses a proprietary electrical interface between processor and optical chiplet, but the company plans to be UCIe-compatible going forward.

“Our world looked very complicated—even as a chiplet, there are lots of different interfaces for different standards,” he said. “With UCIe and CXL, it’s really boiled things down. There’s proprietary stuff out there… but people are collapsing around these standards much more than some of the other ones that existed.”

It is perfectly possible to create a custom version of the TeraPHY chiplet for customer’s protocols, such as NVLink or Infinity Fabric, Wuischpard said, but that would require a new tapeout.

Manufacturing process

Ayar is shipping TeraPHY chiplets today and is intending to ship “thousands of units” in 2023, ramping to bigger volumes over the next couple of years.

“We’ve got a few opportunities with individual volumes in the roughly million-unit range, which would be fantastic, and there’s a push to do these sooner rather than later,”  Wuischpard said. “The question is, can we get everything in place fast enough to do that roll out sooner, just given the cycle time in semiconductors.”

As the demand for semiconductors has bounced back following the pandemic, Ayar, like many fabless companies, has seen schedules delayed due to foundry capacity. This delayed the qualification of Ayar’s manufacturing process several quarters, finally achieving qualification in June. The next step is to work on yields and costs, Wuischpard said.

“There’s been a lot of work on securing all the contracts for volumes, establishing all the protocols for quality and acceptance levels, simulating what the yields should be,” he said. “Also, and this is not obvious but applies to all chiplet makers: you have to have a really good test environment.”

Ayar chiplets co-packaged with processor or SoC die (Source: Ayar Labs)

Ayar has invested significantly in optical and electrical wafer testers to execute this testing at high speed. This part of the process will ultimately be moved to an outsourced semiconductor assembly and test house (OSAT), but it’s up to Ayar to establish the test patterns before this can happen. Ayar provides customers with known good die (KGD), which is especially important considering there can be multiple Ayar dies co-packaged with a customer’s processor.

“By the same token, we want to make sure our foundry is providing us wafers that are high yielding,” Wuischpard said. “Everybody goes through this to a degree, but as a small supplier, I think you’ve really got to prove yourself, and you do that in part through the rigor that you have in your testing.”

How will it all turn out?

What is Wuischpard’s endgame? An acquisition by a company like Intel or Nvidia would be an obvious potential outcome, but Wuischpard said this type of exit is not an explicit part of the plan.

“If you’re building a company to get bought, you’re not going to build the right kind of company,” he said. “Someone could come along; I just want to make sure that we’re not angling for that as a goal at the outset.”

Wuischpard’s belief is that where there are big technology transitions, like the shift from copper wires to optical fibers, new independent companies can be created.

“If we’re even reasonably close to our goals, I think there’s an opportunity to be a standalone, independent provider,” he said. “That would appeal to our founders in particular, because it would mean the widest possible adoption of the technology they’ve poured their life’s blood into.”

 

This article was originally published on EE Times.

Sally Ward-Foxton covers AI technology and related issues for EETimes.com and all aspects of the European industry for EETimes Europe magazine. Sally has spent more than 15 years writing about the electronics industry from London, UK. She has written for Electronic Design, ECN, Electronic Specifier: Design, Components in Electronics, and many more. She holds a Masters’ degree in Electrical and Electronic Engineering from the University of Cambridge.

 

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