Startup Aspinity previously focused on voice detection for always-on-systems with analog neural network chip.
Analog AI chip startup Aspinity is now targeting acoustic event detection, as well as voice detection, in ultra-low power systems. The company is rolling out an evaluation kit to ease development of acoustic event detection systems in battery-powered devices. Aspinity’s analog AI accelerator chip is used to detect acoustic events at the start of the signal chain while microphone data is still in its analog form, meaning digital systems further downstream can remain in sleep mode until an event is detected.
“You can’t duty cycle sound,” Tom Doyle, CEO of Aspinity told EE Times. “You have to have it all because these are random events and if you miss any piece of them, you break down the accuracy of the system.”
Systems listening for voice or audio events therefore have to be always-on. Aspinity hopes to enable always-on battery-powered acoustic event detection systems that can last years, instead of months, on a single charge. Doyle said that Aspinity’s technique can reduce power consumption significantly; since acoustic events like a window break are extremely rare, the rest of the system can remain in sleep mode for the vast majority of the time.
Audio and voice
The company previously focused on voice detection, where its chip can be used to wake up other parts of the system when voice is detected. Downstream digital processing would be used to analyze the voice, perhaps detecting specific wake words or key words, for example. While the new evaluation kit focuses on acoustic event detection, the same analog AI chip can be used for applications across voice, sound and vibration detection, as well as biological signals such as heart rate detection.
The new kit includes AI models for glass break detection and voice detection developed in-house by Aspinity (more acoustic events coming soon). There’s also an Infineon Xensiv IM73A135 low-power analog MEMS microphone which draws just 170 µA. And then there’s Aspinity’s analog AI accelerator chip, which consumes just 30 µW.
Aspinity’s chip is the heart of its offering, allowing signal capture and analysis to be performed entirely in the analog domain, saving a lot of power versus always-on analog-to-digital conversion and digital processing.
Based on its reconfigurable analog modular processor (Ramp) technology, Aspinity’s chip features small parallel, continuously operating analog blocks. The chip is entirely analog, without any clocks — blocks are powered independently when needed.
“[Our chip] leverages a couple of different innovations and patents, the idea of non-linear analog circuitry to use in decision-making, and [our] patented non-volatile memory that we use to store biasing parameters or offsets for our circuits, but also use to store weights for our analog neural network,” said Doyle.
At the front end, the chip has some sensor interface and signal conditioning blocks which supports different sensor types, including accelerometers, microphones, and even multiple sensors.
Feature extraction is “explicitly analog” — analog circuits extract information about the signal, known as features, which are fed to the neural network to help it make decisions (whether the sound coming in is voice or not).
“It’s a bit different to other neural networks out there, just because it’s hard to equate everything from the digital domain to the analog domain,” said Aspinity’s chief science officer David Graham, adding that the chip does not use the spiking neural networks sometimes found in neuromorphic systems.
“We’re performing computations using a form of analog multiplication and accumulation functions, and we’re storing the [analog] weights in our own analog non-volatile memory,” Graham said. “Basically, we’re performing the vector matrix multiplication that you have in any neural network, but we’re doing it in an analog fashion.”
The designer can train their neural network using PyTorch or another training framework, then Aspinity software does the rest.
A compression block is included to store the 500 ms of sound before voice is detected (called “pre-roll”) that wake word engines require for inference. This compression technology is also used outside of voice applications, Doyle said.
Aspinity’s chip can be used to wake up another device, be that a microcontroller or a dedicated wake word detection chip, or something else.
“When we do wake something up, as long as it has the bandwidth and the capability to do that next stage of processing, we don’t really care which one it is,” said Doyle. Aspinity has partnered with ST for compatibility with its microcontrollers, for example. The company’s evaluation kit for voice spotting uses an ST microcontroller which runs a wake word engine. “We are driving more efficiency on the digital end… we do want to get into a position where perhaps we can reduce the bill of materials and not have to have an extra inferencing chip with a high-power core in there.”
Aspinity was founded in 2015 to commercialize research from West Virginia University. Since then, the company has been developing hardware, working with customers to meet their needs. A $2.9-million seed round in 2018 allowed the company to get samples into customer hands in 2019. The company also completed a $5.3-million series A in 2020.
For the future, Doyle can “absolutely” see Aspinity devices in the same package alongside another digital chip.
“Anytime you can minimize your packaging, there’s a benefit to the customer, but there’s also the signal integrity issue,” he said. “There’s a huge opportunity there, in co-locating die and not having to deal with going out of a package and back in. There’s just so many benefits… from the design and technical aspects, but also the cost, bill of materials, integration, and ease of integration.”
This article was originally published on EE Times.
Sally Ward-Foxton covers AI technology and related issues for EETimes.com and all aspects of the European industry for EETimes Europe magazine. Sally has spent more than 15 years writing about the electronics industry from London, UK. She has written for Electronic Design, ECN, Electronic Specifier: Design, Components in Electronics, and many more. She holds a Masters’ degree in Electrical and Electronic Engineering from the University of Cambridge.