The two new IPs expand and extend Alphawave's technology leadership in chiplets and optical solutions.
Alphawave IP has launched two new Interconnect IPs to their product portfolio. AresCORE16 is a Die-to-Die parallel interface that further extends Alphawave’s chiplet leadership by enabling a new generation of chiplet products. OptiCORE100 is a 112Gbps PAM4 optical Serialiser-Deserialiser (SerDes) that enables direct drive of optics and includes advanced DSP techniques for receiving optical waveforms.
“The addition of AresCORE16 and OptiCORE100 bring very exciting new opportunities for Alphawave IP to continue to help our customers solve the increasingly complicated connectivity challenges. AresCORE16 Die-to-Die IP is a key connectivity technology that enables the future of 2.5D and 3D packaging for the emerging Chiplet market and supports new and emerging standards, such as uCIE, Bunch of Wires (BOW), Open-HBI, and others for Die-To-Die interfaces. OptiCORE100 solves the unique challenges of electrical to optical communications in marketing leading power, performance, and area. Optical and Chiplet interface IPs are critical to deliver next generation connectivity within our data centers,” said Tony Pialis, President and Chief Executive Officer of Alphawave.
“All of our silicon IPs leverage the power of Digital Signal Processing (DSP), which makes high performance connectivity much more reliable at very high speeds like 224Gbps and beyond. We constantly push the barrier of performance, power and silicon area with our connectivity IPs, and by leveraging our advanced DSP architectures, we can deliver the maximum benefits to our customers on leading edge TSMC N7, N5, N4, and N3 processes,” said Tony Chan Carusone, Chief Technology Officer of Alphawave.
Alphawave IP’s portfolio of connectivity IPs, including PCIe Gen6, CXL 3.0 and 800G Ethernet PHYs, are available for licensing and delivery now on TSMC N12, N7, N6, N5, N4 and N3 processes. Alphawave IP’s newest IP offerings, AresCORE16 and OptiCORE100 are available now for design starts on TSMC N5 and N4 processes.