Achieving embedded MRAM, flash options for FDSOI at 28nm

Article By : Peter Clarke

Samsung's roadmap shows two phases of rollout for 28FDSOI: eFlash risk production by the end of 2017 and the eMRAM risk production by the end of 2018.

Samsung Foundry is planning to offer spin torque transfer magnetic RAM and flash as embedded non-volatile memory options on its 28nm process.

Kelvin Low, responsible for marketing and business development at Samsung Foundry, told EE Times Europe, that the company roadmap shows two phases of embedded NVM rollout for 28FDSOI. The first is eFlash risk production by the end of 2017 and the second is eMRAM risk production by the end of 2018.

But Low added: "We have both eFlash and eMRAM (STT-MRAM) options available. Having said this, we are expecting market demand to eventually result in a down-select of one of the two eNVM solutions."

Risk production is where foundry clients run their own complete circuits, rather than test structures, but there can still be changes to the process and to the design to optimise performance and improve yield. Because the process is not finalised, such production is at the customers' own risk. The risk production phase can take several months, which implies eFlash will be available in volume in 2018 and eMRAM available in volume in 2019.

MRAM is a non-volatile memory option that has been many years coming but has recently been offered as a stand-alone memory by Everspin Technologies Inc. Samsung acquired the MRAM-developing start-up Grandis Inc. in 2011.

Providing embedded non-volatile memory at 28nm is challenging. The accepted wisdom has been that it is not practical to scale flash to 28nm but that other options such as MRAM, phase-change memory (PCM) and resistive RAM (ReRAM) lack engineering maturity.
Problems with eFlash include endurance and power consumption difficulties at 28nm although one SoC option is to leave the embedded flash circuitry at less aggressive geometries and forego the scaling.

This could be one reason Samsung is pushing eFlash first but will then expect customers to use STT-MRAM in the long term. MRAM is looking to be a favourite in the long-term because of its simplicity of inclusion with CMOS and its voltage schemes. It can be integrated with as few as three additional masks while eFlash typically requires six to eight additional masks.

MRAM is generally implemented "in-plane" but there is the option to implement the magnetic layers as vertical elements for further area reduction. Low said Samsung has not disclosed the details of how it will implement its eMRAM.

However, Samsung did demonstrate a stand-alone MRAM implemented in 28nm HKMG bulk CMOS process at the recent Design Automation Conference in Austin, Texas (June, 2016). "Our teams are now working to port this over to our 28FDSOI process," Low said.

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