Micro Magic says its RISC-V core outperforms Apple M1 and Arm Cortex-A9 on CoreMarks per Watt...
Micro Magic has introduced what it claims is the world’s fastest 64-bit RISC-V core — a device it says outperforms the Apple M1 chip and Arm Cortex-A9. The company feels it has elegantly implemented David Patterson’s original vision for the reduced instruction set computer (RISC) architecture, working comfortably within the power budgets of today’s battery-powered devices.
In late October 2020, Micro Magic issued a terse, two-sentence announcement. It had demonstrated a 64-bit RISC-V core achieving 5GHz and 13,000 CoreMarks at 1.1V. It said a single Micro Magic core running at 0.8V nominal delivers 11,000 CoreMarks at 4.25GHz, consuming only 200mW. To illustrate the point, Andy Huang, an advisor to Micro Magic and behind the creation of the FineSim circuit simulator, gave EE Times a demo of the core running on an Odroid board, achieving 4.327GHz at 0.8V and 5.19GHz at 1.1 V.
Micro Magic is a privately-held EDA vendor based in California, specializing in three-dimensional TSV (through silicon via) layout tools. It claims to be able to load, view and edit design of over one trillion transistors in real time. The company was founded in 1995, sold to Juniper Networks for $260 million, and in 2004 reborn with the same name by the original founders. The founders, Mark Santoro and Lee Tavrow originally worked together at Sun Microsystems and led a team that developed a 300MHz SPARC microprocessor. Huang said, “Santoro was also under Steve Jobs at Apple.”
On the subject of Apple, Huang took great effort to impress upon us the significance of Micro Magic’s performance figures compared to the new Apple M1 chip. “Using the EEMBC benchmark, we get 55,000 CoreMarks per Watt. The M1 chip is roughly the equivalent of 10,000 CoreMarks in EEMBC terms; divide this by eight cores and 15W per core, and that is less than 100 CoreMarks per Watt.” Going on to make a comparison with Arm, he added, “The fastest Arm processor under EEMBC benchmarks is the Cortex-A9 (quad-core), with a figure of 22,343 CoreMarks. Divide this by four cores and 5W per core, and you get 1,112 CoreMarks per Watt.”
He continued to explain the significance of Micro Magic’s 200mW power consumption figure. “In today’s battery-operated devices, CoreMarks per Watt is much more important than CoreMarks per Megahertz. For a typical 5W device, we can implement 25 cores. Who can do 25 cores in the mobile phone industry? Most people limit themselves to four cores or eight cores. So, for companies that need to reduce batter usage, such as Tesla, we can achieve the performance needed.”
Huang said that although the company has successfully operated as an EDA services company, it intends to offer the RISC-V core to customers using an IP licensing model. “The architecture is fully scalable for the mobile industry, for PCs, automotive and data centers. We are completely self-funded, so are not seeking funding.”
While more details are yet to emerge, Huang said that Micro Magic has truly enabled the real capabilities of David Patterson’s vision for the RISC architecture. “We really enjoy his architecture. We’re just expanding the boundaries of his vision. We implemented Dr. Patterson’s vision that RISC-V is so elegant that it has the capability to deliver this power.”