Designing your board with EMC in mind
Our medical doctor always reminds us not to miss our regular checkups, because early detection of health issues can lead to faster and better treatment. Similarly, to take care of your electronic product development, it helps to look out for EMC pit-falls at all stages. Detecting EMC issues early provides more options to remediate the situation and it can even bring down overall product costs. With today’s challenging time-to-market goals for product launch, extending development schedule is extremely expensive in terms of opportunity lost and the cost can inflate exponentially.
Figure 1: EMI measurements at different design phases
Rohde & Schwarz recently introduced a two-part series workshop “Empowering better EMC performance”, with industry experts from Excelpoint, Power Integrations, CST and Würth Electronics, to hare practical insights in tackling EMC issues in project design especially in power related circuitry.
Part 1 was held in Singapore on 5th October 2018. CS Wong, Rohde & Schwarz product manager, presented internal EMI challenges of signal and power integrity in circuit design. To reduce unwanted interference, it is important to avoid antenna structures on PCB design through better grounding, isolation, filtering and shielding. Experts from Excelpoint and Power Integration shared good practices to avoid current loop when designing PCB. CST supported the circuit design concept with simulation and measurements that can help engineers during their design phase.
When you see a problem, isolate and identify the problem with the right instrument. Making the right instrument choice helps the issues investigation and consequently speed up the diagnosis.
Figure 2: Understanding your need for measurement to choose the right instrument
EMI cannot be eliminated but it is necessary to minimize them to the point where it no longer causes issue and complies with EMC standards.
Compromises are required. Single unique solution to the EMI problem may not exist, but a continual attention to minimize them in development process will help.
Part 2 which is scheduled for January 2019 will focus on EMC debugging techniques and offers useful implementation to minimize interference through filters and shielding. If you are interested to know more about Part 2 of the workshop, you may email to firstname.lastname@example.org
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