Provino Carves Own Path to AI World

Article By : Junko Yoshida, EE Times

Network-on-Chip tech garners interest due to its suitability in AI applications

MADISON, Wis. — First of all, Provino Technologies is not an AI chip startup. There are already too many of those.

But the secretive 40-member company, established in 2015 by Shailendra Desai, who had cut his teeth at PA Semi and Apple for system-on-chip (SoC) designs, is getting intense interest from a select few Fortune 500 companies because of his team’s network-on-chip (NoC) IP.

Although the potential number of IP licensees might not be huge, they are a few “large established chip companies” and those “newly getting into the semiconductor business,” explained Desai. They have surprised Desai by considering ways to use Provino’s scalable interconnect architecture for broader applications in — you guessed it — AI. The target apps range from autonomous vehicles and AI to AR/VR.

Desai, however, made it very clear that Provino never altered its original focus or mission for its IP products. Indeed, the companies interested in designing AI SoCs have found Provino.

Provino’s semiconductor IP — called iFabric — is “a packetized and serialized bus with a concept of virtual channel,” explained Desai. By providing multiple clocking options from server-class (high-speed) to consumer devices, iFabric supports popular IP interfaces (AXI 3/4, APB, and AHB). This diversity makes it easier for SoC designers to integrate third-party and in-house IP. The scalable architecture, he noted, “allows you to add or remove IPs easily so that you can design derivative products quickly.”

iFabric: scalable and configurable architecture
iFabric: scalable and configurable architecture (Source: Provino)

It turns out that some of the key elements of the iFabric — its scalable interconnect architecture — could be very useful in AI development. Desai said, “I don’t pretend to know everything about AI, but we are all learning as we go along.”

For one, those looking to design AI SoCs capable of scaling for everything from handheld devices to data centers “need a pushbutton solution,” said Desai, so that their designs can meet “the demand all the way up to higher-bandwidth distribution interfaces.”

When SoC designers look to “tile up convolutional neural networks,” Desai said that they are looking for “inter-process communication” that can achieve higher throughput.

Multicast support?
Obviously, for many AI SoC designers, power is the key, said Desai. “Those looking to reduce power and latency are now asking us, ‘Do you support multicast in the way of information transfer?’”

Multicast support might seem a novel concept in AI, but Ethernet has been doing it for years. Because iFabric was heavily inspired by Ethernet, “we not only know multicast, but we know how to implement it in the right way,” said Desai.

“I don’t want to sound like we have already solved the whole problem,” he said. “But in a constrained environment, we have proven that our interconnect architecture with multicast support can significantly reduce both power and latency” in AI SoCs.

According to Provino, iFabric can bring “consistency in interconnect” across all SoC platforms in terms of “memory, power management, and clock gating views.”

Validated by Netspeed
A company developing technology closest to Provino’s is Netspeed Systems. Netspeed, based in San Jose, California, provides SoC design tools and interconnect fabric intellectual property (IP). Just last month, Netspeed got snatched up by Intel.

When Intel made the deal, Jim Keller, senior vice president and general manager of the Silicon Engineering Group at Intel, said in a statement, “Intel is designing more products with more specialized features than ever before … the challenge is synthesizing a broader set of IP blocks for optimal performance while reining in design time and cost. Netspeed’s proven network-on-chip technology addresses this challenge, and we’re excited to now have their IP and expertise in-house.”

Desai told us, “Netspeed validates the theory we have. SoC designers need NoC IP and automation tools that are much more sophisticated than those internally cobbled together.”

Series A funding
Provino isn’t exactly following in Netspeed’s footsteps as it charts its future. The startup announced on Wednesday (Oct. 10) that it raised $8 million in its Series A. Dell Technologies Capital led the round with participation from individual industry veterans.

Compared to millions, or sometimes billions, of dollars raised by AI chip startups, this is decidedly small stuff.

But that doesn’t seem to bother Desai. Over the last few years, according to Desai, a large automaker in Europe has kept Provino going. The unnamed automaker has been designing its own ASICs (for autonomous vehicles) by using iFabric IP. It is currently using an initial iteration of iFabric IP that no one on the outside has seen, said Desai. When Provino is ready with its first commercial IP either later this year or early next year, the automaker will be first in line with a separate contract.

“We are incredibly fortunate to have their engagement,” said Desai. “Their trusting us has been a tremendous help.”

Interconnect as a backbone of SoC
Asked if he thinks that licensing semiconductor IP is a good business model for a startup like Provino, Desai said, “That’s a good question.”

He quickly added, “Not all IPs are created equal. Interconnect is the backbone of every SoC.” Once the Interconnect IP is used internally by one large company, it will be used over and over throughout a variety of SoCs built on that foundation, he explained. “Our IP isn’t a one-trick pony.”

More exciting to Desai is the fact that Provino will be serving corporations who will be designing their own chips. Just as Apple has already become one of the biggest chip vendors, Desai believes that his company can intersect with a new breed of non-semiconductor companies getting into the chip business.

Today, Provino has in India a large R&D team of about 20 engineers expected to grow to 30 by the end of this year. A team in Santa Clara, California, holds steady at 16 engineers.

— Junko Yoshida, Global Co-Editor-In-Chief, AspenCore Media, Chief International Correspondent, EE Times

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