Comms Chip Jericho2 Gets HBM2, 2.5D

Article By : Rick Merritt

Outperforms ASIC competitors with new architecture and higher bandwidth, adds C++ tools for select customers

SAN JOSE, Calif. — Broadcom’s latest communications processor rides a 2.5D chip stack with HBM2 memory. Jericho2 uses the boost in memory bandwidth to leapfrog the performance of OEM ASICs in high-end switches and routers.

The chip expands into networking the packaging technology pioneered by AMD, Nvidia, and Xilinx in high-end FPGAs and graphics processors. With its StrataDNX Jericho2, Broadcom also takes a small step toward open-programming environments by providing C++ tools for the chip to select customers.

The 16-nm processor, announced Tuesday (March 6), packs a whopping 208 50-Gbits/s PAM4 SerDes to deliver 10 Tbits/s of aggregate throughput, supporting up to 36 400-Gbits/s Ethernet links. It leads a wave of high-end networking devices aiming to enable 400-Gbits/s links in telcom core networks and large data centers.

The HBM2 stack provides eight times the memory bandwidth of the external DRAM used in Broadcom’s previous 28-nm chip. It leapfrogs the performance of Nokia’s FP4, the current king of in-house networking ASICs.

Jericho2 is “a big deal as updates go,” said Bob Wheeler, analyst with the Linley Group. “It’s a major new generation … [that uses HBM and 2.5D] to remove the memory bottleneck.”

While Jericho2 was Broadcom’s first merchant chip to ride a 2.5D stack, the company helped design similar products as machine-learning ASICs for unnamed customers, said Oozie Parizer, a marketing manager for Jericho2. Indeed, Intel’s Nervana uses a 2.5D stack as does an AI training processor expected from startup Graphcore.


A silicon substrate (grey) connects Jericho2 (blue) with an HBM2 stack (yellow). Images: Broadcom.

Despite the still-costly nature of 2.5D chip stacks, Broadcom expects that the chip will power OEM systems by the end of the year priced at a relatively low $1,000 per 400-GbE port.

Parizer called on memory vendors to lower the prices of their HBM stacks “to make this more of a commodity market because this is the future in networking and high-end processing. Our advances in processors have been on the order of 5x in two years, but they have not been matched by advances in DRAM.”

The chip is now sampling to customers with devices running in the lab with HBM2 modules running at target speed. Broadcom expects that it will be in production in nine to 12 months.

A step toward software-defined networks

Broadcom will let select customers program the network pipeline of Jericho2 using C++-based tools that the company developed to automatically generate microcode. The tools mark a small step toward the kind of software-defined networks that carriers and large data center operators have been requesting for years.

The Open Networking Foundation, a trade group of carriers and web giants, demonstrated last month comms systems from multiple companies managed in software using the open-source P4 language. ONF is asking vendors to adopt P4, originally launched by startup Barefoot Networks, which makes a rival network switch called Torfino.

Broadcom is resisting the push to P4. Most OEMs and end users do not need to program processor pipelines, and Broadcom’s C++ tools are adequate for the job, said Parizer.

Programming Jericho2 “requires deep understanding and a large team to own it, handle regressions, and deal with not breaking other apps — it’s not the recommended path,” said Parizer, noting that such work takes significant time.

“We object to the concept that P4 is open. It’s controlled by one silicon vendor, while we enable a more open and powerful language … There’s a lot of hype around P4, but most customers don’t require it.”

The Broadcom tools let developers define new pipeline stages and expand address-lookup tables. “This is real future-proofing and the heart of a programmable device,” he said.

Broadcom also released a second chip, called Ramon, that can be used to link multiple Jericho2 chips in a large switch or router, potentially spanning multiple chassis.

Broadcom gives select customers C++ tools to program its so-called Elastic Pipe.

Broadcom gives select customers C++ tools to program its so-called Elastic Pipe.

Cisco demonstrated a Jericho chip working with one of its largest routers. Broadcom expects that many other large OEMs and data center operators will adopt it.

Broadcom quoted a dozen potential customers praising Jericho2 in a press release. They included China’s three carriers as well as AT&T, Verizon, and Tencent and OEMs such as Arista, Huawei, and ZTE.

The previous 28-nm Jericho chip was announced in March 2015. The technology comes from the high-end switch fabric chips designed by startup Dune Networks that Broadcom acquired in late 2009.

Jericho is one of a trio of high-end comms chips that help the company dominate Ethernet networking. The other two are Tomahawk, upgraded in December, and Trident, upgraded in July.

— Rick Merritt, Silicon Valley Bureau Chief, EE Times

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