A wave of new players and fan-out wafer level packaging (FO WLP) technologies are poised to enter the market, following the high volume adoption of InFO and further development of eWLB technology, according to a report from Yole Developpement. Taiwan Semiconductor Manufacturing Company's (TSMC) FO WLP solution called InFO will be used to package the Apple A10 application processor, implemented in the new iPhone 7 series.

Production starts in 2016 and represents a big change in the fan-out industry for several reasons. First of all, in terms of volume, capturing the Apple processor market is a big asset for fan-out technology. iPhone 7 phones are expected to be sold in more than 200 million units. In terms of technology capability it is also a major turn: processors require thousands of connections while the fan-out market was essentially focused on limited IO count applications so far. Eventually, the potential for market spread is very high—the Apple brand brings more interest to the fan-out platform.

2016 is a turning point for the fan-out market since Apple and TSMC changed the game and may create a trend of acceptance of fan-out packages. The market is expected to be split in two types: The “core” market, which will include single die applications such as baseband, power management and RF transceivers. This is the main pool for FO WLP solutions and will keep growing.

The second is the “high-density” market of fan-out—started by Apple APE—that will include larger IO count applications such as processors and memories. This market is more uncertain and will require new integration solutions and high performing fan-out packages but has a very high potential.

Yole Fanout forecast Figure 1: Fan-out activity forecast (Source: Yole Developpement)

With such a high potential for the high-density fan-out and solid growth of the core fan-out, the supply chain is also expected to evolve with a considerable amount of investment in fan-out packaging capabilities. Several players are already offering FO WLP while many others are developing their competitive fan-out platforms to enter the fan-out landscape and enlarge their portfolio.

Apart from TSMC, STATS ChipPAC is willing to make further investments powered by JCET, ASE extends its partnership with Deca Technologies while Amkor, SPIL and Powertech are in development phase eyeing future production. Samsung is seemingly lagging behind and is considering its options to raise competitiveness.

Which player will have the winning solution?

Mobile customers have high expectations of miniaturisation and higher integration while keeping costs low. This leads naturally to WLP for cost and performance and System-in-Package (SiP) solutions for integration and functionality. FO WLP has proven its ability to reach these targets.

Its small form-factor and low cost capabilities shown in the first wave of acceptance, referred to as the “core” market, are now enhanced with high-integration ability of the new fan-out architectures. These architectures are expected to spread driven by the “High-Density” fan-out market. The main example available of wider integration being TSMC fan-out package-on-package (PoP) for Apple.

Yole Fanout history Figure 2: Fan-out history (Source: Yole Developpement)

Today there is a sense of urgency in developing line widths/spaces down to 2/2µm and below, developing multiple RDL layers, integrating multiple dies and dealing with subsequent warpage and yield concerns. Different processing approaches attempt to implement best practices for known good die and known good RDL to increase overall yield. Other known challenges such as die shift have also not been fully resolved yet.

Yole Fanout roadmap Figure 3: Fan-out roadmap (Source: Yole Developpement)

As package price represents the final verdict, carrier size evolution is an important topic, both for wafers and panels, since it can help to drastically reduce the cost. The main trend is still to keep wafer carriers but some players are already investing and developing panel-based solution.