Home | Login | Register Now   [Nov 22,2009]
Global Sources
EE Times-Asia
For Registered Users Home / For Registered Users

Cyclone III simultaneous switching noise (SSN) design guidelines
Author: Altera

This application note provides a framework to describe SSN and understand the sources of SSN, discusses ways to mitigate SSN for Cyclone III FPGAs by using I/O settings and selecting proper I/O standards, and provides guidelines on PCB design that are good practice for general high speed digital designs.

Please login or register with us to view this article>>


If you have already registered on the following websites, please log in using your email address and password

EE Times-Asia sites:

Talkback

eeForum:
Demystifying Vietnam

What does Vietnam offer that a rising number of top-tier semiconductor companies are setting up and expanding operations there?

more

 
Top tech resources
 
India Newsletter
 
Go to top