Eliminating I/O coupling effects when interfacing large-swing single-ended signals to user I/O Pins on Spartan-3 Generation FPGAs
Author: Xilinx

This application note describes solutions to receive large-swing signals by design. In one solution (and in the general case of severe positive and/or negative overshoot), parasitic leakage current between User I/O in differential pin pairs may occur, even though the User I/O pins are configured with single-ended I/O standards. This application note addresses the parasitic leakage current behavior.