Home | Login | Register Now   [Nov 23,2009]
Global Sources
EE Times-Asia
For Registered Users Home / For Registered Users

Looking beyond advanced design geometries
Author: Kevin Walsh

With the presence of the design geometries between 1000nm and 1nm, we can start deploying 32nm flows and find the solutions of the transitional barriers between 32nm and 22nm. Design verification plays a vital role in reducing the design cost and improving the yield of the new products and product platforms.

Please login or register with us to view this article>>


If you have already registered on the following websites, please log in using your email address and password

EE Times-Asia sites:

Latest News
Talkback

eeForum:
Demystifying Vietnam

What does Vietnam offer that a rising number of top-tier semiconductor companies are setting up and expanding operations there?

more

 
Top tech resources
 
India Newsletter
 
Go to top