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Serial-output ADC needs fewer FPGA I/O pins


The high-speed 2-wire serial interface of Linear Tech's LTC2274 ADC reduces the number of data I/O lines required between a 16bit ADC and the FPGA from 16 CMOS or 32 LVDS parallel data lines to a single, self-clocking, differential pair communicating at 2.1Gbit/s.

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