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Clock translator provides jitter cleanup, synchronisation

Posted: 22 May 2014     Print Version  Bookmark and Share

Keywords:clock translator  Analog Devices  jitter  SONET/SDH 

[Summary of tips] Analog Devices, Inc. has unveiled a low loop bandwidth clock translator that provides jitter cleanup and synchronisation for many systems, including synchronous optical networks (SONET/SDH).The AD9554 generates an output clock synchronised to up to four external input references. The digital PLL (DPLL) allows for reduction of i......
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