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3D chip-making technique utilises metallisation layers

Posted: 08 May 2014     Print Version  Bookmark and Share

Keywords:3D chip  metallisation  active material 

[Summary of tips] 3D chips bring to mind current fabrication techniques including stacking dies connected by through-silicon vias (TSVs), and another one that leaves out TSVs such as the vertical transistor arrays that BeSang Inc. recently licensed to South Korea's SK Hynix. Yet another technique that uses low-temperature materials claims to be ......
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