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Chip design tool delivers tenfold performance boost

Posted: 25 Mar 2014     Print Version  Bookmark and Share

Keywords:place-and-route  IC  Synopsys 

[Summary of tips] Synopsys recently upgraded its place-and-route chip design software, and its beta customers are already raving about the IC Compiler II's performance boost reaching up to 10 times by utilising just one-fifth of the memory of its predecessor.The update leverages new algorithms and the multi-threading capabilities of modern proce......
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