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Cost-efficient 3D IC wafer processing without adhesives

Posted: 29 Jan 2014  Print Version  Bookmark and Share Subscribe 

Keywords:AML  3D IC packaging  adhesive  wafer bonder 

[Summary of tips] During a 3D TSV Summit on Minatech' campus in Grenoble, France, a resounding topic across the floor was on how to cut costs in 3D IC packaging. Disregarding IC design, there are many processes involved before dies can be stacked together. These include the manufacture of Through Silicon Vias (TSV), wafer handling and thinning, ......
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