Global Sources
EE Times-Asia
Stay in touch with EE Times Asia
EE Times-Asia > Manufacturing/Packaging

Cost-efficient 3D IC wafer processing without adhesives

Posted: 29 Jan 2014     Print Version  Bookmark and Share

Keywords:AML  3D IC packaging  adhesive  wafer bonder 

[Summary of tips] During a 3D TSV Summit on Minatech' campus in Grenoble, France, a resounding topic across the floor was on how to cut costs in 3D IC packaging. Disregarding IC design, there are many processes involved before dies can be stacked together. These include the manufacture of Through Silicon Vias (TSV), wafer handling and thinning, ......
Please login or register with us to view this article>>

Article Comments - Cost-efficient 3D IC wafer processin...
*  You can enter [0] more charecters.
*Verify code:


Visit Asia Webinars to learn about the latest in technology and get practical design tips.

Back to Top