Global Sources
EE Times-Asia
 Challenges & Opportunities 2011   MCU   MEMS   IGBT   processor   LED   RFID
EE Times-Asia > FPGAs/PLDs
 
 
FPGAs/PLDs  

HLS tool allows designers to focus on ASIC differentiation

Posted: 09 Sep 2010  Print Version  Bookmark and Share Subscribe

Keywords: ASIC  high-level synthesis  HLS 

[Summary of tips] Mentor Graphics Corp.' Catapult C tool for the high-level synthesis (HLS ) of next-gen ASICs has been deployed by Toshiba Information Systems .With Catapult C, Toshiba Information Systems explained that it spends less time working on the implementation details and more time on differentiating its products by creating sophistica......
Please login or register with us to view this article>>
 

Article Comments - HLS tool allows designers to focus o...
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Christmas Wishlist
Peek at Hot Gadgets for 2012
Smart energy "Try explaining to your eight-year-old son that instead of an Xbox, you got him a Wi-Fi enabled smart energy thermostat to help minimize his energy consumption and carbon footprint..."
 

Go to top