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A high-level synthesis methodology for complex FPGA

Posted: 25 Jun 2010  Print Version  Bookmark and Share Subscribe

Keywords: complex FPGA  synthesis methodology  implementation VLCD 

[Summary of tips] This article describes the implementation of Virtual Line Crossing Detection (VLCD) on an Altera Stratix II FPGA and the methodology we used. Our primary challenge was to demonstrate a working video analytics algorithm on an FPGA within an extremely aggressive schedule of six weeks. On previous projects, we overcame similar cha......
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