Controls/MCUs 
TMS320DM36x VICP algorithms and codecs integration
Keywords: codec integration VICP algorithms TMS320DM36x VICP
[Summary of tips] TMS320DM36x devices have two accelerator sub-systems: HD video imaging co-processor (HDVICP) and VICP. The HDVICP engine is suitable for running H.264 encode/decode, while the VICP engine is suitable for running various imaging algorithms, such as video noise filter (VNF) and de-interlacing (DEI), and codecs such as MPEG4 and M......Please login or register with us to view this article>>
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