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Peridynamic equations spot chip flaws during design

Posted: 01 Sep 2009  Print Version  Bookmark and Share Subscribe

Keywords: peridynamic equations  chip flaw detection  interface 

[Summary of tips] A new method that harnesses an electronics failure simulation technique, called peridynamic equations, claims to enable engineers to detect design flaws resulting in cracks, fractures and interface faults before chip fabrication. Instead of the traditional differential equations and finite element methods used to model semicond......
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