FPGAs/PLDs 
Managing ground bounce in large FPGAs
Keywords: Ground bounce control FPGA devices PCB layout
[Summary of tips] Ground bounce must be controlled to ensure proper operation of high-performance FPGA devices. Particular attention must be applied to minimizing board-level inductance during PCB layout. This document describes calculations to help to ensure that a design meets input undershoot and logic-Low voltage requirements for devices rec......Please login or register with us to view this article>>
|
Not yet registered?
 Register FREE to view unlimited features, tutorials and products, and enable any content alert service! |
Registered already? Login to view complete content.
|
Article Comments - Managing ground bounce in large FPGA...
Visitor0213
(To avoid code verification, simply login or register with us. It is fast and free!)
Top Ranked Articles
Christmas Wishlist
All I want for Christmas is anything on this year's Best of Innovations Design and Engineering Award list!
Search EE Times Asia
Peek at Hot Gadgets for 2012
