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Toshiba, Cadence collaborate on 65nm design
Keywords: 65nm design analog mixed-signal IC simulator
[Summary of tips] Cadence Design Systems Inc. announced that Toshiba Corp. has deployed Cadence Virtuoso simulation technology to provide its analog and mixed-signal chip designers an easy-to-use and accurate reliability analysis flow.The Japanese firm chose the Virtuoso UltraSim full-chip simulator for quantitative simulation methodology for re......Please login or register with us to view this article>>
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