Global Sources
EE Times-Asia
 Catch the latest   Vital Signs     Tech Watch     In Asia
EE Times-Asia > T&M
 
 
T&M  

DAC5686/DAC5687 clock generation using PLL and external clock modes

Posted: 10 Aug 2007  Print Version  Bookmark and Share Subscribe

Keywords: DAC  PLL  VCO  external clock modes 

[Summary of tips] The DAC5686 and DAC5687 both have an onboard PLL and VCO, which allows for some diversity in the input clock, data rates and the update rate of the DAC. There are three stages of interpolation (2x, 4x, and 8x) in the DAC5687 and an extra stage of interpolation (16x) in the DAC5686.The combination of this with options for interl......
Please login or register with us to view this article>>
 

Article Comments - DAC5686/DAC5687 clock generation usi...
Comments:  
*  You can enter [0] more charecters.
*Verify code:
 
Christmas Wishlist
    Kindle Fire Hot CE innovations at the CES

    All I want for Christmas is any of this year's Best of Innovations Design and Engineering Award honorees! Here's the EE Times pick for Top 10 CE gadgets.

Peek at Hot Gadgets for 2012
Smart energy "Try explaining to your eight-year-old son that instead of an Xbox, you got him a Wi-Fi enabled smart energy thermostat to help minimize his energy consumption and carbon footprint..."
 

Go to top