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EDA/IP  

Routing suite receives 45nm design update

Posted: 30 May 2007  Print Version  Bookmark and Share Subscribe

Keywords: 45nm  45nm DRC  netlist-to-GDSII tool  multicorner clock tree synthesis 

[Summary of tips] Gearing up to deal with 45nm IC physical design challenges such as interconnect resistance, Sierra Design Automation Inc. announces three significant enhancements to its Olympus-SoC placement and routing suite. These include a new global routing solution, a multicorner clock tree synthesis capability, and a 45nm "ready" router.......
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