EDA/IP 
Cadence deploys CPF in low-power design flow
Keywords: CPF Cadence Si2 Accellera UPF
[Summary of tips] Cadence Design Systems Inc. has added the Common power format (CPF) to its existing logic design, verification and implementation tools. This marks the first deployment of CPF, the format that's at the heart of a controversial standards effort and that now forms the basis of low power solution, Cadence's complete design flow fo......Please login or register with us to view this article>>
|
Not yet registered?
 Register FREE to view unlimited features, tutorials and products, and enable any content alert service! |
Registered already? Login to view complete content.
|
Article Comments - Cadence deploys CPF in low-power des...
Visitor0530
(To avoid code verification, simply login or register with us. It is fast and free!)
Top Ranked Articles
Christmas Wishlist
All I want for Christmas is anything on this year's Best of Innovations Design and Engineering Award list!
Search EE Times Asia
Peek at Hot Gadgets for 2012
