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Cadence, Mentor spar in high-speed realm
Keywords: Cadence Design Mentor Graphics interconnects Ibis Macromodeling Library Task Group standard
[Summary of tips] An ad hoc group is trying to come to grips with escalating problems arising from a lack of standards for simulating chip interconnects as they scale up to 5Gbps and beyond. The issue has pitted Cadence Design Systems Inc. and Mentor Graphics Corp. in a battle to gain support for competing solutions.Two proposals are on the tabl......Please login or register with us to view this article>>
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