FPGAs/PLDs 
Boundary-scan tool eases FPGA, CPLD programming
Keywords: Macgraigor J-SCAN boundary-scan tool debugger
[Summary of tips] For programming FPGAs, CPLDs and other devices, Macraigor Systems LLC announced the availability of J-SCAN Version 2.1 high-speed boundary-scan debug and programming tool. Macraigor Systems is a supplier of JTAG and background debug mode (BDM) applications for on-chip debugging.Macraigor's v2.1 supports USB 2.0 and USB 1.1, wit......Please login or register with us to view this article>>
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